I'm attempting to design a data logger and the AD7193 seems to fit my requirements. I'd like to drive it by an external clock in a GPS-disciplined loop while sampling at an integer rate, as this would simplify comparing signals from distributed sensors. I am looking at choosing a SiT5358 oscillator which eliminates the need for a DAC as there's a digitally-controlled version. I'm new to designing hardware systems and have (at least) two questions about this pairing:
- The sample rate of the AD7193 is proportional to the f_CLK/A where A is a constant depending on many configuration options. Supposing A is fixed, then a desired sample rate could be achieved by varying f_CLK. Are there limits to how far from the internal 4.92Mhz clock rate we can vary f_CLK and still have stable operation?
The datasheet states, "[The] internal clock has a tolerance of +-4%." This seems to imply that operation would be unaffected by a deviation up to +-4%. Is a greater deviation advised with an external clock?
- The SiT5358 comes in LVCMOS and clipped sine wave output flavors. The AD7193 datasheet suggests either is tolerated by the AD7193, though they are attached slightly differently. Are there reasons to choose one over the other?