So... I'm designing a kind of retro CPU testbed (Z80, 6502...), akin to a generic programmer such as the xgecu. I have an Atmega2560 as my microcontroller, and a 40 pin ZIF socket. All ZIF pins are redirected to known I/O MCU pins. I'll then have a configurable REPL working via Serial/USB.
My problem is on VCC/GND configuration. Not all CPUs have the same VCC/GND layout, and I'm not confortable with the Atmega2560 source/sinking the necessary current through its IO pins (although current CMOS versions of these CPUs do have very little consumption).
Besides a rail of 160 jumpers (to select VCC/GND for each possible pin), or an array of 80 transistors, what would be the most elegant way of arbitrary routing source/sinking paths in a programmable fashion?