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I tried simulating a basic comparator configuration in Proteus with only a single supply. The reference/trip-point is 2V. However when I simulated the DC transfer curve, all negative input voltages are saturated to +VCC and not to the lower rail voltage (+1V).

Why can't a single-supply comparator handle negative inputs? Why won't the output be at the lower rail when the noninverting input is negative?

The comparator that I used is LM311 with pull up resistor at the output.

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  • \$\begingroup\$ Take a look at the internal circuit of a differential (or even ordinary single-ended) amplifier stage and you will answer for yourself. Try to follow the paths of currents and see if they are possible. \$\endgroup\$ Aug 9 '20 at 6:21
  • \$\begingroup\$ @Circuit fantasist I think it's possible. I replaced the comparator with an opAmp and it works fine(output is at the lower limit of 1V whenever input is negative). I wonder why \$\endgroup\$
    – hontou_
    Aug 9 '20 at 6:49
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[ at end of this answer, we compare the LM311 with the LM339 (which will function down to GROUND)]

After examining the LM311 datasheet/schematic (from Texas Instruments page 10), here is what occurs:

  • signal comes to base of PNP level shifter, emitter current set by current source up at +VDD

  • the emitter of that PNP shifter comes to base of one NPN of a diffpair(A)

  • the collector of that NPN goes to load resistor, which is biased one_diode_drop below +VDD; this load resistor feeds the base of a 2nd NPN diffpair(B); with signal near ground, the headroom is quite large, so this does not upset the comparision balance.

  • THE LIMITING FACTOR is the NPN current mirror for tail current for diffpair(A)

SUMMARY: the input voltage is shifted up ONE diode drop, but then enters a stack of transistors (diffpair(A) and its current source) that needs TWO diode drops to function accurately.

Fundamentally that first diffpair/tailcurrent become CUTOFF.

Cutoff is a strong word; if the bipolar has 10mA at 0.8 volts Vbe, then at 0.4 volts the current will be (approximately) [ (0.8 - 0.4) / 0.058 ] = 0.4/0.058 ~~ 6 decades less current.

Again examining the LM311 schematic, if that constant current source (tail current, the first transistor from the lower left) is disrupted, then the base biasing (partly established by the solitary JFET) is disrupted, and the 2nd tail current is also disrupted.

Notice the collector resistors of the 2nd diffpair(B) are IMBALANCED. One is 750 ohms, one is 600 ohms. These two resistors control behavior of the rail_rail high_voltage amplifier, which has a constant_current pulldown and a NPN emitter follower which controlled the base of PNP which is making the crude comparison about "HIGH? LOW?".

There is a CLUE about imbalanced behavior as the Vin approaches -VDD. The imbalanced resistor values (top center) of 750 and 600 ohms are probably attempting to adjust for imbalanced Vbe of the NPN emitter follower and the PNP base connected to that emitter follower.

As the tail currents (constant current transistors, the 2 at very bottom left) are disrupted, voltage drops across 750 and 600 resistors may be the cause of output default behavior.

Regarding modeling in Proteus, I have no opinions.

You could BUILD one of these, using 2N3904 NPNs and 2N2906 PNPs. Just don't try to operate at 50 volts.

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Had the LM311 been designed 20 years later, good CMOS devices could have been used; FETs can be fabricated inside WELLS, and the WELLS can be tied to convenient voltages inside the circuit. Some diffpair WELLS are exploited to cause enormous increases in Vthreshold, and that effect allows Pchannel FETS to measure below ground, and allows Nchannel FETs to measure above VDD (this method is called "body effect" where the well/body/tub voltage is NOT same as the Source).

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Comparing LM311 to LM339

LM311 has PNP (moves signal UP) followed by 2_diode_drop NPN diffpair + NPN current mirror. This comparator in NOT spec'd to work down to GROUND.

LN339 has PNP DARLINGTON diffpair (uses 4 PNPs) and a current source up at rail. This comparator is spec'd to work down to GROUND.

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  • \$\begingroup\$ I learned a little here. Thanks. \$\endgroup\$
    – jonk
    Aug 9 '20 at 9:21
  • \$\begingroup\$ I'm confused. Does it mean the diodes are the ones causing the output to saturate to Vcc when output is positive? Also, is it possible to simulate the whole functional block diagram at Proteus so I can explore it? \$\endgroup\$
    – hontou_
    Aug 9 '20 at 11:45
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@analogsystemsrf wrote a good synopsis of why your LM311 is not behaving as expected, so I will point out a few work-arounds.

From T.I. LM311 datasheet

enter image description here

As you can see input common mode is limited to Vee +0.5 V to Vcc - 1.5 V. Sorry to say but most all op-amps and comparators have a common mode less than the supply rails, though some like the slower LM139 will accept inputs as low as gnd or Vee. Seems like you need to use clamp diodes and possible zener diodes to clamp inputs to safe levels or latch-up can occur.

Still, even Schottky diodes have a 500 mV drop. Another way is to divide your signal down by 1.5 or 2, then adjust your 2 volt trip point. A comparator with R-R outputs will get close to zero volts, but nothing is perfect. I would suggest using bi-polar supplies, but diodes are needed to prevent negative outputs.

There are SLOW CMOS op-amps and comparators that tolerate 200 mV above and below the supply rails. You would have to decide if a slow response time is an issue.

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