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What does indicated time in below graph means?

datasheet

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What does indicated time in below graph means?

It's the length of time that the MOSFET can reliably conduct for the applied drain-source voltage and drain current. For instance, with a drain current of 10 amps, the drain-source voltage can be about 15 volts - that's a power dissipation of 150 watts and, that power can be "safely" dissipated for a maximum duration of 10 ms.

Or, if the drain-source voltage is 10 volts, the drain current could be around 15 amps. Again that's a power dissipation maximum of 150 watts: -

enter image description here

What you see is a constant power line of 150 watts and, given that case temperature and junction temperature are stated (25 °C and 175 °C), we see that the thermal impedance is: -

$$\boxed{\text{150 °C / 150 watts or 1 °C / watt}}$$

If the dissipation time period is reduced to 1 ms, then the drain current could be about 45 amps at a drain-source voltage of 10 volts - that's a power dissipation of about 450 watts

So, generally, the shorter the time period, the bigger the power event can be.

But, be very aware that approaching these limits must be done with proper consideration of ambient temperature and heat-sinking requirements as specified in the data sheet.


How SOA relates to transient thermal impedance (data sheet fig 11)

SOA stands for Safe Operating Area but it's sometimes better to think of it as showing the unsafe operating area! The Thermal impedance graph implies the same power vs time information: -

enter image description here

I've added three points to the above graph at: -

  • 10 ms (1 °C / watt),
  • 1 ms (0.35 °C / watt) and
  • 0.1 ms (0.1 °C / watt).

I've covered the 10 ms thermal impedance further above.

At 1 ms, it's 0.35 °C / watt hence, with a maximum case to junction temperature difference of 150 °C we can expect to cope with a power of 150/0.35 = 429 watts. I estimated 450 watts from the earlier SOA graph and this ties in nicely albeit with some slight error. In other words, it's better to use the thermal impedance graph because it's more relevant especially when it also plots duty cycle - the SOA graph assumes a single pulse and is unrealistic in many practical cases.

At 0.1 ms the thermal impedance is 0.1 °C / watt and, with a case/junction difference of 150 °C, that allows a peak power of 1500 watts. If you look at the SOA graph for 0.1 ms, you can see that it bisects the co-ordinates 50 amps and 30 volts i.e. 1500 watts.

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    \$\begingroup\$ 150W for 10ms with or without heatsink OR a heatsink will increase the amount of time as long as we don't hit the temperature/wattage limit? \$\endgroup\$ – ElectronSurf Aug 10 at 8:26
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    \$\begingroup\$ @ElectronSurf the above graph has a case temperature (\$T_C\$) of 25 °C and has the junction temperature (\$T_J\$) at 175 °C. That defines the transient thermal impedance of the device i.e. (175 - 25) °C per 150 watts or 1 °C/watt. See also figure 11 for the same number. From figure 11 (at 10 ms) we are at the limit where this can be sustained by an infinite heatsink. Remember that the SOA curve is a maximum and should only be approached for shorter durations than those specified. \$\endgroup\$ – Andy aka Aug 10 at 8:53
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    \$\begingroup\$ The little red circles add values to the graph and indeed help newbies like me to appreciate the "three dimension/variable" relationship. I am a 2D human with 2D eyes and always found it hard to read 3D. :) \$\endgroup\$ – tlfong01 Aug 10 at 9:11
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    \$\begingroup\$ Thanks for extending the answer. \$\endgroup\$ – ElectronSurf Aug 10 at 10:54
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The safe operating area is a graphical presentation of how long is required to heat up various regions of the transistor.

Some power MOSFETs dissipate heat only at the silicon surface. The timeconstant of 10 micron thick "Active Region", where the source and drain and gate are fabricated, is 1.14 microSeconds. Pulses longer than 1.14uS become very dangerout to the FET, because you have filled up ALL THE HEAT STORAGE volume. The heat must now exit thru the underlying (useless) silicon and on down into a mounting base/tab/flag/leadframe, and perhaps into a heatsink.

Many decades ago, International Rectifier Corporation developed the VERTICAL FET (MOSFET). Importantly, the heat is dissipated throughout the thickness of the silicon and not just at the surface. The standard thickness for many silicon products is 100 microns, where the initial 300 micron wafer is back_grinded to remove the bottom 200 micron. Then a copper plate (often copper) is attached, to provide electrical and thermal exit paths. IMPORTANTLY, the FET generates its heat in the entire 100 micron thickness of the silicon; the timeconstant of that 100 micron thick FET is 100X slower than the surface_FET, at 100 * 1.14uS == 114 microSeconds.

Summary:

  • some power MOSFETs generate heat only at the top 10 microns.

  • some power MOSFETs generate heat throughout the (100 microns, if back_grinded) silicon thickness, and thus have 10X the pulse_energy tolerance.

What is going on? Once the region between Source and Drain is fully hot (to a few hundred degree C), you have to back off, ease up, on the heating because the Thermal Resistance starts to matter.

Can you compute this? Yes. The thermal capacitance (specific heat) of silicon is 1.6 picoJoules per degree C per cubic micron.

Example: Power MOSFET of thickness 100 micorns, area 2mm by 2mm (2,000 by 2,000 microns), has volume of 400,000,000 cubic microns. Multiply by 1.6 picoJoules

  • safe_heat_storage = 4e+8 * 1.6e-12 == 6.4e-4 or 0.00064 joule per Degree C

If the safe temperature rise (deep inside the silicon) is 100 degree C, then

  • Safe_Pulse_Energy === 0.00064 joule/degree * 100 degree = 0.064 joules

Remember --- its the region between the Source and the Drain that is your friend, because that can be heated up without requiring any heatsink or heat flow.

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