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enter image description here

I am trying to understand the exact working of this circuit, I have been told that this circuit provides a duty cycle of 50% from my previous questions, the same which I successfully verified in LTSpice simulation also, but when I built the exact circuit on a breadboard and observed the waveform on a CRO, I got the following which is clearly not 50%.enter image description here

I have used the exact same value of components except for R4 which is variable. Can someone tell me what the mistake is as to why I am not able to obtain a 50% duty cycle? My ultimate objective is note down the corresponding frequencies for different values of R4, but I am confused whether to consider the ON time or OFF time for my application since both are different now? Apologies if the time scale data of the CRO isn't clear.

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  • \$\begingroup\$ why do you require 50% duty cycle? \$\endgroup\$
    – jsotola
    Aug 10, 2020 at 17:23
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    \$\begingroup\$ The NE555 will not work well below 5 volts. Use CMOS TLC555 for a range of 2 volts to 15 volts. \$\endgroup\$
    – user105652
    Aug 10, 2020 at 17:38
  • \$\begingroup\$ FWIW: This is not a CRO. Also what are the yellow and purple traces measuring? \$\endgroup\$
    – user253751
    Aug 10, 2020 at 18:42
  • \$\begingroup\$ @user253751 Purple is probably an RC filter, if yellow is what's driving it. We don't know the heights or DC baseline of that ripple but at least it's not inconsistent with that idea. I'm ignoring the schematic details and only looking at the display, though. \$\endgroup\$
    – jonk
    Aug 10, 2020 at 20:08
  • \$\begingroup\$ In one of your previous Questions, you stated that frequency varies when you drive it at 3.3V and know the voltage must be over 4.5V. How is this behaviour different? You exceed manufacturers recomendations, you get what you get! It is that simple! \$\endgroup\$ Aug 10, 2020 at 21:24

1 Answer 1

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The circuit is theoretically correct, the faults are probably due to the assembly. (Is R2 likely to be connected to the Discharge pin?) R1 is not required for proper operation at all. The frequency depends on R4 and the duty cycle is always 50%. 555-50%

555-ti

EDIT: NE555 at 3V. You built it well and measured accurately. :) The NE555 need a minimum operating voltage of 5V. ne555at3v

NE555 at 5V: ne555-5v

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  • \$\begingroup\$ OP is using an NE555 on a 3.3 V supply. \$\endgroup\$
    – Transistor
    Aug 10, 2020 at 22:08
  • \$\begingroup\$ @csabahu Thanks for ur edited answer I understood what the problem is. The issue is I simulated the same circuit in LTSpice at 3.3 V and got a 50% duty cycle, so does this mean that LTSpice is not following the datasheet specifications? Also in ur first graph why is Uout not at the operating voltage i.e 3V but is somewhere around 2.4V \$\endgroup\$ Aug 11, 2020 at 7:31
  • \$\begingroup\$ @Rohit Kumar The max. output voltage of the NE555 is less than the supply voltage. Therefore, 1k is required from the output to the supply voltage for a 50% duty cycle. The model in the LTspice system does not appear to be completely correct. \$\endgroup\$
    – csabahu
    Aug 11, 2020 at 9:23
  • \$\begingroup\$ @csabhau also can u tell me by looking at the circuit i posted in my question how are people saying that it has a 50% duty cycle. I have read the datasheet but didn't understand how it's 50% \$\endgroup\$ Aug 11, 2020 at 9:31
  • \$\begingroup\$ @Rohit Kumar The average voltage of the capacitor is half the supply voltage. Charging and discharging with the same resistance and the equal voltages (+ - VCC / 2) results in exactly 50% duty cycle. The output must swing between 0 and VCC. The output charges and discharges the capacitor. \$\endgroup\$
    – csabahu
    Aug 11, 2020 at 9:54

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