First off, there are lots of different versions of the bootloader and patterns how you enter each of them implemented in the various families of the STM32. Indeed newer parts have a pattern to enter the bootloader which matches your description.
The main document to read carefully is the application note AN2606 about the bootloader.
One main recommendation is the following:
It is recommended to keep the RX pins of unused bootloader interfaces
(USART_RX, SPI_MOSI, CAN_RX and USB D+/D- lines if present) at a known
(low or high) level at the startup of the bootloader (detection
phase). Leaving these pins floating during the detection phase might
lead to activating unused interfaces.
Which of course doesn't directly tells us what happens with pins, but activating a bootloader interface is not what you want in your case.
Pay special attention to the pins you need for SWD. Often those are shared with USART2 functionality and accidently activating that interface will lock you out of SWD.
Then there are tables for each device which tells you which interface maps to which pin and functionality and which are used as input and output.
I agree, that it isn't clear at which state the pins are while the bootloader is not using that interface actively.
For the USART TX the text usually sounds like this: "PA9 pin: USART1 in transmission mode", so is it only an output when it is in transmission mode?
For the SPI MISO it goes like this: "PA6 pin: Slave data output line, used in pushpull pull-down mode", which could indicate that it is in a input state when not in use, why else would there be a pull-down resistor active?
Similar thing with CAN TX: " PB9 pin: CAN1 in transmission mode": sounds like it might be disable when CAN is not in transmission mode.
Like Chris Stratton suggested in the comments I took my Nucleo with the STM32L452RE and erased the flash and it behaves like you described and ended up in the bootloader.
The board is powered by a lab supply with current limit on.
I then hooked up a wire from GND or 3V3 and connected it to the output pins of the bootloader interfaces and got the following - not encouraging - results:
- USART TX: high impedance
- SPI MISO: driven high
- CAN TX: driven high
My take on it:
- Check exactly which behavior applies to your chip
If you end up in the bootloader:
- do not use conflicting signal directions (the behavior I observed might change if there is an update in the bootloader)
- make sure it does not use a interface which blocks SWD by keeping the input pins for that interface at a known constant level