Your question is so fundamental that it can be answered (if you want and if you have the courage to accept it) fully intuitively without any math or knowledge of electricity. The capacitive load is simply a capacitor; so you have to have a good intuitive notion about the capacitor. But you already have it from life - a tank that can store something (air, water, money, data, charge, energy, reputations:-), and your task is to fill or empty it... fast or slow... Fish tank and communicating vessels are the most popular fluid analogies of the capacitance phenomenon. So you have the answer to the question when these tanks (capacitors) will charge quickly and why...
Now let's put the analogies aside and discuss something "more serious". Like anything in this world, capacitive load can be both useful and harmful:
A useful capacitive load is, for example, the capacitor in an RC integrating circuit. In this case, its slow charging is something we want, because it allows us to get an idea of the time through the voltage (hence the resistor in series to the capacitor). In this way, we can make timers (555), ramp generators and more.
In other cases (e.g., dynamic RAM, sample&hold circuits, peak detectors), the capacitive load is also useful since we used it to memorize (store) digital or analog data... but now we want to quickly charge the capacitance. In these cases, the charging voltage source has to be powerful enough so as not to "dip up" (as you guessed).
Strictly speaking, this arrangemebt is incorrect because the capacitor short-circuits the voltage source... but it is still used. The capacitor differentiator (without a resistor) is another well-known example.
An undesired capacitive load is the parasitic (stray) capacitance of elements and wires that causes them to behave to some extent as capacitors. The undesired capacitance appears "in parallel" to the useful property of resistance or inductance... or an open circuit (no load connected). In these cases, the slow charging is undesired. And we know how to solve this problem from our routine (the analogies above) - by charging with high current through low resistance (hence the absence of resistance).
Capacitive loads may cause problems at the complementary outputs of digital circuits. At high output voltage ("1") they are charged through the upper transistor (the charging current exits the output). At low output voltage ("0") they are discharged through the lower transistor (the discharging current enters the output).
Finally, about the phase shift... it is a great challenge to explain it in a fully intuitive way...
Imagine you slowly started to open the tap to fill a bucket with water (the water flow is the "current" and the water level is the "voltage"). As a result, the "voltage" increases when the "current" increases.
Then begin slowly closing the tap (to empty the bucket, as you probably think:-). Supprisingly, the "voltage" continues increasing although the "current" decreases. This is an example of the so-called "phase shift"...