How have they derived 20ns(VDD/5.5)?
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\$\begingroup\$ They haven't derived it - at 5.5 volts it'll be 20 ns and if the actual supply is lower, that time will reduce. \$\endgroup\$– Andy akaAug 17, 2020 at 13:16
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\$\begingroup\$ How will it be 20ns at 5.5? \$\endgroup\$– Govind SrivastavAug 17, 2020 at 14:20
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\$\begingroup\$ Simple math: 20 ns x 5.5/5.5 = 20 ns. \$\endgroup\$– Andy akaAug 17, 2020 at 14:24
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It is not derived from anywhere. When the 400 kHz Fast Mode was defined, it was specified that the output drivers must have slew rate limiting to limit signal bandwidth, which prevents electromagnetic interference and signal reflections.
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\$\begingroup\$ Yes this produce 1st null of EMI at 50MHz at 5.5V and followon harmonics reduced. \$\endgroup\$ Aug 17, 2020 at 13:55
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\$\begingroup\$ Tony can you elaborate further. Can you please give the mathematical expression of 1st null that is seen at 50MHz at 5.5 \$\endgroup\$ Aug 17, 2020 at 14:03