Context: I am about to send a board to manufacturing which includes the LTC2348 for high-precision acquisition of the 3 analog outputs (single-ended) of a PSD frontend. The 3 signals are Xdiff (proportional to X displacement, +/-10V), Ydiff (same for Y), Sum (0-10V, the scaled-down norm of the [Xdiff,Ydiff] vector) (100Hz bandwidth), therefore they have to be acquired at the same time. I'm aiming at an accuracy of 300uV peak on each channel, so I need to be careful right?
Could you review the design description below and tell me what should be improved? I have doubts on grounding in particular.
Signal conditioning: My PCB has 3 SMA connectors, each with a passive first order RC filter (R is the PSD frontend output impedance) sized for 1.5kHz cutoff referenced to the local analog ground, and the outputs of the filters are buffered by a low offset voltage precision opamp in unity-gain non-inverting configuration with bias current compensation - the OP1177. I did not find many with these specs able to handle the 600Ohm at 10V from a +/-15V supply (not entirely sure this will work either in fact since 16mA is out of the Vdropout graph, but the extrapolation seems to say it can?). Not sure whether I should add another 220nF cap across the feedback resistor.
Acquisition: Then the outputs of the buffer go to the inputs of a differential truly bipolar ADC - here the LTC2348-16 -, with respect to the analog ground again.
Grounding scheme: Both the buffers and the ADC are supplied with +/-15V with respect to Analog ground. I've checked and normally all PSUs of the system are isolated, so Analog ground should be at the centre of several interconnected grounds without loops:
Layout: I have routed all the signals (including grounds) to make sure I had the shortest, least parallel paths between signals, returns close to signals, and then added 2 analog ground planes on both top/bottom sides. Here is a summary with an overview with planes, and some key signals highlighted in blue without planes:
For the actual control from the uC, I'll start a conversion (at 600Hz frequency) by sending a 1us pulse on the CNV line, then I'll wait for BUSY to be low, and finally I'll initiate a standard SPI transfer until I collect the 3 first packets. This device is the only one on the SPI lines.
- Is there anything wrong I should change, be it in the schematic or the layout? This is to ensure the board meets the requirements.
- What other good practices did not I think about? This is to improve my understanding of analog circuits.
I have tried implementing the ADC datasheet's true bipolar input architecture ; alternatively it also suggests to use a LTC1469 as a way to convert from single ended to differential if you think that's much better, but I don't see why that would increase accuracy here (and the filtering as described would not do well with the 600Ohm Rin).
Otherwise, for the same architecture, the LT1468 may handle the load better in spite of worse perf overall though?