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I have a circuit with several modules that share a common ground. One of them is a common ESP32 dev board. It looks that if I connect something to an IO pin of the ESP32 then it pulls it down significantly (from 3V to about 1V) when the ESP is not powered. If I also disconnect the ESP from the common ground then the issue disappears.

I tested with a DMM and there is very high (Mohm) resistance between ground and the pin of the ESP.

Is this normal? What inside the ESP32 causes it?

schematic

simulate this circuit – Schematic created using CircuitLab

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Unless explicitly documented as allowed, you must never apply an I/O voltage to a chip which is outside the range of its own supply by more than a diode drop.

This is because ordinary inputs have protection diodes to the positive and negative rails which are normally reverse biased or have only a small voltage on them due to minor supply rail differences.

But once the protection diode to the positive rail becomes forward biased, the I/O will end up trying to power the chip and everything sharing its power net!

In this case your resistor probably limits stress, but you get stuck with a pulled down signal and a power net that's at about the internal threshold voltage where the circuit would start operating enough that power draw would increase, preventing it from rising higher when fed from such a high impedance source.

But even if you avoid damage, this situation isn't resulting in the intended operation, and likely consumes supply current in a way you were trying to avoid by powering down the ESP32. Additionally there are (other) parts where the power on reset circuit will not properly function if the supply rail was in such a lifted-up condition before "real" power was applied.

In your case with the ESP32 you probably want to do one of three things:

  • Explicitly drive the signal low from its source before de-powering the ESP32

  • Suspend the ESP32 but do not actually de-power it (though ESP suspend modes are more limited than most)

  • Use additional circuitry, for example the common MOSFET pass gate type of level shifter includes in its range of operation the situation where the supply for the lower voltage side is entirely absent. If you're doing a custom board, this basically means adding an SOT-23 FET (BSS138 is probably not idea but widely utilized) and using two pull-up resistors in place of your current divider; if doing a lash-up of existing boards you can buy multi-channel versions of this on postage-stamp sized boards quite inexpensively.

(The exception to all of this is input structures which are rated for moderate overvoltage. For example, many other 3v3 MCU's have 5v tolerant pins which may not exhibit this behavior.)

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No load V=2/3 5V @ 6.7k no power V=0.9V.

What is the load?

3.3V/0.9= (R+6.7k)/R.
R=6k7/((3.3-0.9)-1)=2k4.
I≈5V/(10k+2k4)=0.4mA. So ESD diode is OK. But chip is being pulled up by this diode inside when pwr is OFF. NG!

Why are you wanting this?

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