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i'm trying to test SPI communication with Microchip SST26VF064B serial flash, and i have encountered a problem while reading JEDEC ID from the chip. According to datasheet, first three bytes should be 0xBF, 0x26, 0x41/0x42. I get entirely different data: 0x7C, 0x20, 0x7F. The chip seems to respond to read JEDEC ID command 0x9F, but always sends the same unexpected data.

enter image description here

I've tried SPI driver provided with SDK for SOC i am working with, and also simple bit banging SPI - result is the same, so i think that SPI communication works ok. I'm running out of ideas what to try next... Is there any reason i can get this data instead of expected ID?

enter image description here

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    \$\begingroup\$ Add CE# to your traces. Look ok? \$\endgroup\$ Aug 19, 2020 at 20:48
  • \$\begingroup\$ What is the yellow signal in your picture? Also, what is your SPI clock frequency? If the purple Freq = 41.kHz is your SPI clock, that's way too fast for this device. The data sheet says 104MHz is the absolute maximum. \$\endgroup\$
    – David
    Aug 19, 2020 at 21:15
  • \$\begingroup\$ CE trace looks ok. According to datasheet, during JEDEC ID read, CE should be low on entire transmit 0x9F/read three bytes cycle, and it's exactly what is happening - CE is staying low all the time during JEDEC ID read cycle. \$\endgroup\$
    – woytekm
    Aug 19, 2020 at 21:21
  • \$\begingroup\$ You say data received is 0x7C, 0x20, 0x7F, but scope says 0x7C, 0x20, 0x6F. Which is it? Where did you get the chip from? When does CE go low? \$\endgroup\$ Aug 19, 2020 at 21:22
  • \$\begingroup\$ @David: yellow signal is MISO, i think i have switched the probes. Yellow - MISO, blue - MOSI, purple - clock. And this is bit banged by software, and very slow - clock is only 41kHz, i don't understand your remark about 104Mhz max speed? I'm bit banging this only at 41kHz, so it's way below speed limit... \$\endgroup\$
    – woytekm
    Aug 19, 2020 at 21:26

1 Answer 1

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It seems that this was a complex problem partially related to clocking and also lack of series resistor on MISO line. Problems finally went away after adding 100ohm resistor on MISO and setting nRF52840 SOC SCLK line to "high drive", to make clock edges fall/rise faster.

I suspect that my problems are related to a fact that i'm currently working on a breadboard with fairly long jumper wires (10-15cm). As with every project, i'm trying to test all unknown components before i'll integrate them into a circuit/PCB. Of course, breadboard can and will introduce it's own problems, and this is probably happening here, but still, i have worked with few different SPI chips, and i have never encountered such erratic behavior of the signals on the bus before.

- First problem: slave is outputting something on MISO, but output data is unexpected/wrong. I have included oscilloscope screens in the original question, and on second, expanded one, one can see little spikes occuring on MISO. I have examined these spikes, and it seemed that they occur always at clock edge falls, when slave should shift next bit out:

Yellow - CS, Blue - Clock, Purple - MISO (MOSI is left out on these screens) enter image description here

On above upper screen, one can see that slave detects clock edge fall and MISO is starting to go high (apparenty some bit in readed byte equals 1), but then as clock edge falls even slower, slave gets confused somehow and shuts MISO down even before it reaches proper logic H level (at least thats my understanding of what's happening here). Second, lower screen is for comparison, when "high drive" feature of nRF52840 SOC is enabled on SCLK pin - clock edge falls faster, and MISO acts properly with this setting - chip is outputting expected data.

- Second problem: MISO signal is ok when probed unconnected. After connecting to master, MISO signal gets distorted to the point it's unreadable by master, or there is no MISO signal at all.

Below is proper behavior (with 100ohm resistor on MISO, high drive enabled on SCLK) - this is a different flash chip than in original question - i have changed it to Micron MT25QL128ABA, but it behaved exactly the same. Probed with master connected to MISO. Yellow - CS, Blue - Clock, Purple - MISO. MOSI is left out on these screens.

enter image description here

Below is behavior without resistor - no MISO signal at all. Probed with master connected to MISO. Yellow - CS, Blue - Clock, Purple - MISO. MOSI is left out on these screens.

enter image description here

I have found numerous threads on Nordic forums, describing similar MISO problems: https://devzone.nordicsemi.com/f/nordic-q-a/47335/problem-using-digital-io-as-miso https://devzone.nordicsemi.com/f/nordic-q-a/47968/spi-doesn-t-work-in-nrf52810-while-emulating-nrf52810-in-nrf52832dk-was-successful/190230#190230

I'm not sure if this is some bug or misconfiguration of SOC pin used for MISO, or is it related to long SPI bus wires in my test circuit. From what i've readed - resistors can be used on SPI bus to match impedance of receiver and trasmitter when wires/traces are long (but is 10cm long enough to cause such problems?). Fact is, that relatively small value resistor on MISO helps here. I would like to know why exactly that happens, but i lack solid low level knowledge to be sure. I will incorporate resistor on MISO on a PCB, but i'll test it with 0R value first, to see if better conditions on PCB (shorter traces) will make this work without additional resistance.

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  • \$\begingroup\$ Sounds to me like you got it to work under your current (and controlled) conditions. I wonder if it will continue to work under different and varying conditions? Temp, noise, and age. What you ended up with (utilizing a series resistor) is a non-standard solution. \$\endgroup\$ Sep 1, 2020 at 18:26
  • \$\begingroup\$ I have added more in depth explanation of what is happening, and also referred to resistor problem. \$\endgroup\$
    – woytekm
    Sep 5, 2020 at 7:42

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