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I'm a beginner at PCB design.

We've subcontracted routing for a PCB; it contains mixed analog and digital signals and it's a 4-layer PCB with an inner split GND plane (Signal - GND - VCC - Signal).

They delivered it to us and I've got some questions about how they designed the GND, because it's not what I'm used to seeing. For example:

zoom on analog side of the PCB

Inside zone "1" :

  • I don't really understand why they put tracks rather than make a copper pour? Is it a good practice to minimize crosstalk and have a better return path?
  • Don't know why there are two GND vias lost between the 2V5 and 3V3 pins, just linked to the inner plane (no copper pour at top nor bottom).

Inside zone "2" :

  • Again, I don't understand why they made two different copper pours for capacitors and a bigger one at the bottom, just linked to the bottom and inner layers. Is it better than just making one big copper pour with the 2 GND pads of the capacitors?

Is thier anything wrong with my pcb?

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    \$\begingroup\$ The real simple answer is ask them. \$\endgroup\$
    – Andy aka
    Aug 21, 2020 at 13:42
  • \$\begingroup\$ Of course and I will do it, I just want to read differents point of view about this kind of routing because it don't really seems to be a common practise, I'm more used to see filled copper pour on top and bottom \$\endgroup\$
    – lnnzgs
    Aug 21, 2020 at 14:07
  • \$\begingroup\$ Putting each cap through a different power cable ground line (assuming that is a power connector anyway) will isolate them a little more because of the wiring resistance/inductance. It is possible they were worried about isolating one from transients on the other. I would ask them. \$\endgroup\$
    – user1850479
    Aug 21, 2020 at 15:29
  • \$\begingroup\$ It could be 2 is thermal pad for double sided components. And 1 is the shortest path to Pwr/gnd planes \$\endgroup\$
    – Tony Stewart EE75
    Aug 21, 2020 at 15:41

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Zone 1:
The vias are tied together with traces, it might minimise high frequency inductance, for most designs it won't matter (less than nH equals GHz freq response). They are tied to the ground plane anyway if the stack up you have shown in the question is right, then there should be a global ground that is usually not visible in altium.

Zone 2:
Ground plane on the top layer, also won't do much because it would reduce the impedance to the ground plane to air by less than 1pf

You may want to double check the dfm because there are some nets that appear disconnected (there are no thermal connections reliefs between C130 U2 C143 C81 ect and thier associated power planes)

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