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I'm learning about how to combine common-collector stages for an audio amplification project, and clearly there is something I don't understand. The circuit shown combines 5 stages of emitter followers. I've designed stage each to have a DC bias point of one diode drop above 0.5Vcc. Each stage has an output impedance far less than the subsequent stage's input impedanceenter image description here (about 1/20). Unfortunately, it doesn't work. The output voltage (before the output capacitor) rises to about 16.7 volts but refuses to go below 9.55 volts, making a horribly distorted output signal.

If the stages were numbered 1-5 from left to right, here are the impedances I calculated:

Stage 1: Rin = 12.5k, Rout = 125 Stage 2: Rin = 2.5k, Rout = 25 Stage 3: Rin = 500, Rout = 5 Stage 4: Rin = 100, Rout = 1 Stage 5: Rin = 20, Rout = 0.2

I used a 10v amplitude (20v p-p) input signal at 1 kHz.

I set the input capacitor to 2 Hz and the output capacitor to 20 Hz to act as a 20Hz. high-pass.

I know there are other solutions better-suited to these needs such as a Darlington, cascode, push-pull, etc. I'm not interested in other ideas, but merely seeking to understand how CC stages can be coupled together. Here's the question:

How do I design multiple CC stages to follow one another so that there is no distortion?

As for design specs, Vcc is 24v and I'm hoping to be able to drive an 8ohm speaker at something around 0.5 to 1 watt from 20Hz to 20kHz.

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  • \$\begingroup\$ Read through this and see if that helps somewhat. Otherwise, if you are insisting on DC-connected stages, there's a lot more detailed work required. \$\endgroup\$ – jonk Aug 23 '20 at 14:24
  • \$\begingroup\$ You could also benefit from reading the Appendix found here in redrawing your schematic. \$\endgroup\$ – jonk Aug 23 '20 at 14:50
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    \$\begingroup\$ Note that for each stage, the emitter resistor of the previous stage and the lower base bias resistor are in parallel. Also, the design point for the rest bias point of each stage cannot be the same, because each stage has a 1-diode-drop shift between input and output. \$\endgroup\$ – AnalogKid Aug 23 '20 at 14:56
  • \$\begingroup\$ Updated post to include a little more about design specs. \$\endgroup\$ – nuggethead Aug 23 '20 at 15:54
  • \$\begingroup\$ @nuggethead It's still not clear if you are requiring DC coupling or if AC coupling is acceptable. Which is it? \$\endgroup\$ – jonk Aug 23 '20 at 21:08
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This is a faulty design.

  1. There is no voltage gain, only unipolar current gain and passive pull down
  2. There is no negative feedback
  3. The load is AC coupled lower R than final stage emitter R so it becomes emitter current starved and cannot pull down enough current to AC load of 8 ohms
  4. The DC offset is 5x -0.65V

Bad design since no design specs and bad methodology for a power amp.

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  • \$\begingroup\$ I think I understand what you are all saying are the flaws of this design, thank you for replying. As to Tony's comment on voltage gain, I am assuming that a previous stage such as a diff. amp is supplying voltage gain; this circuit is just my attempt at current gain. Would reasonable steps to improve it begin with capacitively coupling the stages to center all five input voltages around 0v? \$\endgroup\$ – nuggethead Aug 23 '20 at 15:49
  • \$\begingroup\$ No. Review industry design with front end gain and driver triple darlington or 2 or 3 stage emitter follower with limited voltage gain <50 with negative feedback to desired power levels using push pull complementary PNP NPN drivers. Dont guess, learn by reverse engineering. \$\endgroup\$ – Tony Stewart EE75 Aug 23 '20 at 16:06
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So let us provide 1 watt RMS into 8 ohms. With the driver being a common_collector (emitter follower).

Using equation: Power = Voltage^2/Resistance, with P = 1, and R = 8, we find

  • VoutRMS = sqrt(power * resistance) = sqrt(8)

or

  • VoutRMS = 2.828 volts RMS or 8 volts peak-peak.

And IoutRMS = VoutRMS/R = 2.828/8 = 1/3 amp peak.

For some headroom, let us use 12 volts, in class A ( heat wasting) circuit.

To drive an 8 ohm load with little loss, have the Rout of the final emitter follower be 1 ohm. That requires 26 milliAmps idling current.

However, 26mA idling current does not support the 1/2 amp peak.

Thus, for moderate distortion, let us bias that final emitter follower at 2/3 amp. At 12 volts, that final stage dissipates 2/3 * 12 = 8 watts.

The final transistor will need heatsinking (3" by 3" at least) and probably a cooling fan.

This is a class_A mindset, and energy gets wasted. But the musicality should be superb ---- no crossover distortion.

Let us suppose you use a Darlington output device.

The "reac" (0.026/Iemitter) at 0.66 amps is 0.026/0.66 = 0.04 ohms.

The Rin of the Darlingtom is beta * reac = 1,000??? * 0.04 = 40 ohms.

Now bias the base of the Darlington at +7 volts; use 750 ohms to ground, and 560 ohms to +12.

You need to have 0.66 amps steady state with about 5.5 volts on the emitter.

That requires (V = I * R, or R = V/I) 5.5/(2/3) = 5.5 * 3/2 = 8 ohms from emitter to Ground.

This will be a HOT resistor. So compute the power (DC_disispation is fine), and size appropriately. You might even buy a DALE Company metal_case resistor with 2 mounting tabs, and dump the heat in the chassis of yor power stage.

Is this a complete answer? probabaly not, unless your previous circuit can drive [ 40 ohms || 750 ohms || 560 ] ohms.

And to avoid upsetting the DC_opertaing point we computed, yo need a DC_blckng capacitor. WIth the large voltage swings, that capacitor might end up with polarity switching, so yo uneed TW) such caps in series.

Pick the value using 2 * PI * F * tau = 1 (from omega * Tau = 1),

which becomes 2 * PI * 20Hz * R * C = 1, thus

C = 1/(2 ( PI * 20hz * 40 ohms) = 1/(6.3 * 20 * 40) = 1/ 5,000 = 220 uF

Needing the TWO caps in series, use 470uF.

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