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We were talking about this simple ramp generator: What would be the simplest BJT based *linear* ramp generator? and talking about simulation. So I downloaded LTspice drew up the circuit and started to measure. But it's not working! Here, the green trace is at the collectors of Q1 and Q2, the blue trace is on the PULSE generator to verify that I have it set up right.

enter image description here

When I only measure at the collectors of Q1, Q2, I get this weird line:

enter image description here

Here is the ramp.asc file. I must be doing something really stupid. Who can spot the error?

Version 4
SHEET 1 1196 680
WIRE -64 -144 -240 -144
WIRE 96 -144 -64 -144
WIRE 96 -32 96 -64
WIRE -240 0 -240 -144
WIRE -64 16 -64 -64
WIRE 32 16 -64 16
WIRE 96 96 96 64
WIRE 352 96 96 96
WIRE -64 128 -64 16
WIRE 96 144 96 96
WIRE 352 144 352 96
WIRE 576 192 496 192
WIRE -240 288 -240 80
WIRE -64 288 -64 208
WIRE -64 288 -240 288
WIRE 96 288 96 208
WIRE 96 288 -64 288
WIRE 352 288 352 240
WIRE 352 288 96 288
WIRE 576 288 576 272
WIRE 576 288 352 288
WIRE -64 304 -64 288
WIRE 800 464 768 464
FLAG -64 304 0
SYMBOL res -80 -160 R0
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res -80 112 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 80 -160 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 512 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL cap 80 144 R0
SYMATTR InstName C1
SYMATTR Value 33 pF
SYMBOL pnp 32 64 M180
SYMATTR InstName Q1
SYMATTR Value BC556B
SYMBOL npn 416 144 M0
WINDOW 3 57 67 Left 2
SYMATTR InstName Q2
SYMATTR Value BC546B
SYMBOL voltage -240 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 576 176 R0
WINDOW 3 44 86 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0 0 .005 .01 100)
TEXT -274 328 Left 2 !.tran 0.05
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    \$\begingroup\$ Here's what I simulated. I used a \$15\:\text{V}\$ rail, though, to get a nice \$5\:\text{V}\$ peak voltage for the ramp. (You may notice.) \$\endgroup\$
    – jonk
    Commented Aug 24, 2020 at 5:42
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    \$\begingroup\$ You should provide ramp.asc rather than the netlist. here is what I get with R2 = 200, R3 = 1K, R1 = 1.5K and C = 1nF (refer to my schematic for the part numbers). I don't see much reason to go below 1nF NP0 at that frequency. \$\endgroup\$ Commented Aug 24, 2020 at 5:58
  • \$\begingroup\$ Now try 1MHz 1% pulse and buffer the output. \$\endgroup\$ Commented Aug 24, 2020 at 7:41
  • \$\begingroup\$ I had to make a 10MHz sawtooth for my OCXO PLL mixer in ‘76 for doppler tracking a rocket try that with <1% ramp ratio \$\endgroup\$ Commented Aug 24, 2020 at 7:57
  • \$\begingroup\$ It was better than this, but I did it your way. tinyurl.com/y4ox7v95 \$\endgroup\$ Commented Aug 24, 2020 at 8:11

1 Answer 1

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I can't reproduce your waveforms by recreating the exact schematic from your 1st picture. Have you modified some settings? I used a .step to cycle between the values of 33p (your value, black trace) and 33n (blue trace) for C1, mostly to show the differences, but also to show that it works (though not as you'd expect):

ramp

I am considering the deafult models from the default installation; if you modified, in any way, the models for the transistors, then the results of your simulation may be different. Also, there is no need to specify the number of periods for the PULSE() source, unless you really need a certain number of them; 0 means the pulses repeat forever.

The "netlist" you provided does not help. As @SpehroPefhany mentioned in the comments, you need to copy-paste the contents of the .asc file. This is a simple schematic, so it didn't take long to recreate, but if you had a larger one... Still, for the case where it would indeed not work, there are a few possible solutions.

The solver first will try to solve for the operation point, since you have provided no flags. This means that, when you hit "run", the circuit should have been running since the beginning of time, having had time to settle all the possible transients, to a specific operating point -- the one you see at the simulation start. For that to happen, inductors are considered short-circuits and capacitors open-circuits. What you show in your plot is the voltage across the capacitor starting at ~4.78 V. That makes sense if you consider the resistive divider formed by R[1:3], and the static resistances of the transistor polarized by those resistors.

If you want to see the "normal" behaviour (i.e. what you expect to see), you have to tell the solver, because it cannot read minds. You have a few choices:

  1. Add the startup flag: .tran 0.05 startup. This makes DC sources to ramp up in a fraction of the total simulation time (10 us, IIRC). This way, the beginning of the simulation will see the supply voltage at t=0 as 0 V, thus the capacitor will also start from zero.

  2. Add initial conditions. This will force the solver to consider a custom value for the voltage at that node. This can be done in two ways:

  • global condition, with a SPICE directive: .ic v(x)=<value> (considering x as the label for that node). For your case, <value> can be 0.

  • local condition, by adding ic=<value> to the capacitor, next to its value (also 0 for your case).

  1. Adding the uic flag. This forces the solver to avoid calculating the operation point, and start everything from zero. That is, it considers the beginning of time starts with your pressing "run". From that moment on, it will calculate and show all the values as they progress through the simulation. Use this option with care, since it can mean the difference between simulating for a minute vs an hour. In this case, it's a very simple circuit.

There may be other, more exotic ways, such as an actual circuitry (a VCSW, perhaps) that forces the capacitor to be shorted and opening up after the simulation is started, or adding a simple, minor pulsed current source that forces zero current prior to simulation and a very narrow pulse after, to kick-start the voltages (this is mostly used for oscillators, but it works here, too), but they'll only add extra burden to the matrix solver.


Now that you posted the code for the .asc file, that gave me a good chuckle. My eyes must be getting worse than I thought, because you assigned 33<space>pF as the value for the capacitor. I'm surprised you didn't say anything about the error log popping up, that would have simplified things greatly (not to mention it kinda screams about the cause of the error). The very first lines are:

Error on line 6 : c1 n004 0 33 pf
     Unknown parameter "pf"

That <space> doesn't belong between a numerical value and its metric prefix, because the parser will interpret that as two values, 33 and pF. Since it doesn't recognize pF as a keyword or a flag, and it can't evaluate it (not lastly because of the lack of curly braces or single quotes), it interprets only the first value, 33, thus considering the capacitor as 33 Farad, and complains about the rest in the error log. That's why you see an almost pure integrator behaviour there.

Whatever's written above still stands, though, with the addition that the circuit will function correctly without any of the settings, since V2 is actively contributing to the discharging of the capacitor. But you can see how, even in my picture, it starts from ~4.78 V, because of the explanation above.

BTW, there's nothing wrong by writing units (F, uH, kOhm, etc), LTspice will ignore them, but it's useless, unless you like seeing the units.

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  • \$\begingroup\$ Yes, that space was it. I did see the error log pop up but I didn't think it was an error log, it seemed like an informational display, and I should have read what it said. Thank you!. \$\endgroup\$ Commented Aug 24, 2020 at 18:18
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    \$\begingroup\$ @GuntherSchadow I think you can trust error to be an error. The warning might be omitted, but error is not wise to ignore because even if the simulation has completed, the whole simulation might be wrong. You're welcome! \$\endgroup\$ Commented Aug 24, 2020 at 19:19

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