IC Max IO Pin Current

I was looking at the spec sheet for the ATTiny2313A microcontroller and it specifies an absolute maximum rating for the DC current through each IO pin at 40mA, and the maximum DC current through the ground/Vcc pins at 200mA.

I'm planning on using this micro controller to drive some LED displays, so there could be potentially a significant amount of current being sourced/sinked. I know I absolutely should keep the currents below the absolute maximum rating, but preferably I'd like to keep this below a recommended level, which unfortunately there's none listed.

The same goes for a variety of other IC circuits (logic shift registers, analog switches, multiplexers, etc.) I looked into using for driving the LED displays, which only list absolute maximum current ratings.

So my question is what is generally a good safety margin for different IC circuits which only list absolute maximum current ratings? Can I bump right up to 40 mA* and be perfectly safe? Or do I want a comfortable safety factor of 2x, 3x, etc.?

*note: I'm assuming I never actually exceed 40 mA, for example a 35 mA nominal value with a 5 mA variance.

post-note: I know that there exist specially designed constant-current LED drivers, however I think this is still a relevant question for driving other components.

Absolute maximum ratings are there to tell you what is (pretty much) guaranteed to damage your IC if exceeded, they are not recommended for normal use (notice the "at these or above..." in the first clip below)

All decent datasheets will have recommended operating conditions, which are the ones you want to go from rather than the absolute maximum values. For most small micros, 15-20mA is a typical maximum operating condition.

In the datasheet for your uC, it gives a table showing the OH and OL voltages over current, which both range up to 20mA. Note the voltage rise/drop at 20mA and you can see exceeding this will cause the OH and OL levels to go out of spec compatibility wise (example shown for 5V supply - things are different for 3.3V and 1.8V)
For example you can see at 25°C, the output low voltage is at around 0.5V @ 20mA (more with higher temp)
So, I would assume 20mA max for the outputs (at 5V - see other tables for 3.3V and 1.8V). Also take note of the little notes under the tables detailing the guaranteed hi/lo input values and combined current ratings.

Basically decide on your operating conditions (temp, voltage etc) read all the tables carefully and do the math to make sure you keep within specs.

If you are planning on driving some LED displays, either use an appropriately rated driver chip or add some discrete transistors on each pin to drive the LED. Unless you are only using a couple of low current indicator LEDs, this is generally the way to go.

• Oh, durr. I was wondering why I couldn't find any recommended operation conditions, I guess I was looking for all the wrong things. Commented Dec 23, 2012 at 21:27
• +1 (+100 if that was possible) for pointing out that the absolute maxima are NOT the design values for normal operation! Commented Dec 23, 2012 at 23:05

Note: As others have pointed out, absolute maximum ratings should never be intentionally approached. They are the known failure point of the chip. However, they provide a very useful design point for understanding how far away you are from that maximum. This answer focuses on solving what's left of that design problem -- namely, how far away should one be from that maximum value (and why).

There are two big issues to consider when sizing output current in static situations: voltage output and thermal output.

Voltage output

As you increase the output current, the output voltage will begin to "fail" (be greater than expected for an output "low" and lower than expected for an output "high") due to the finite output impedance of the GPIO pin's output driver. This, in turn, will disturb the Q-point of your output-attached circuit.

This is especially interesting in the case of highly non-linear devices like LED's. If you change the voltage you apply to an LED a little bit, the current demand changes a lot more in relation.

This leads to the general principle that you want the output voltage to "error" by no more than 10% (to make your design life easier).

In order to go anywhere near the absolute maximums you will have to suffer something like >60% error in your output voltage. In fact, the specifications for your MCU don't even show you how much error there would be at that output level.

You'd get something like 1V out of an output "high" from a 3V VCC. That level isn't high enough to reliably signal "high" to other devices (in digital systems).

To design the current limit (here, given Vcc=3): 3 - 0.1(3) = 2.7

At 2.7V, the nominal current limit is 8mA -- that is, a bit less than your expectation of *30*mA or so... ;-)

Interesting note from device physics is that the n-side (low side) in almost every CMOS output driver I've looked at is a bit stronger than the p-type high side. This is because electrons (the majority carrier in n-type FET) move about twice as easily through the channel as holes (the majority carrier in p-type FET's). To compensate, chip makers double (approx) the size of the p-type transistor until the performance of the driver is roughly symmetrical, but the low-side usually retains a slight (<10% advantage) even so.

This case is no exception...

You can see in this figure that 0 + 0.1(3) = 0.3V --> 9mA, about 10% greater than the 8mA previously.

So you should install your LED's pointing into your chip if possible. That is, design them so that output low = LED illuminated. Something like this:

Thermal output

High currents in the pin driver = heat (obviously). Heat++ --> disaster. GPIO driver circuits are usually evenly distributed around the periphery of the die by geometric necessity (often times they determine the minimum size of the die).

In the case of this Atmel chip (ATMEGA8, see below), they most certainly are. The GPIO circuits are clustered around the dark blue wire-bonding sites in the cyan ring around the (dark) logic and memory areas in the center.

This is all just boundary estimation and slightly hand-wavy, but engineering is about getting things done, so here goes... ;-)

Using neighboring pins at high current levels should result in at least linear derating.

If you assume that the part distributes heat roughly evenly (fair assumption for your small die), you can get a first-order approximation by working backwards from the absolute maximum rating (40mA) and assuming that the neighboring pin will share 100% of the heat burden.

That means that if you have one 40mA (don't actually do this) output, its immediate neighbors should be at 0mA. 20mA output --> 10mA neighbors, etc...

If I've explained well enough, then it should now be clear that you pick the minimum between the two methods.

Page 199 gives you what you want to know. Each pin can safely/recommended source/sink 5/10/20ma at 1.8/3/5v, without too much voltage drop (+- 0.5v at recommended current). Max Current 40ma per pin, voltage drop will be greater. Don't exceed 60ma out or in on all pins combined at any given time. Pages 218-220 give nice little graphs that show the voltage drop vs current output.

VOL Output Low Voltage(3)
IOL =20mA,VCC =5V 0.8v
IOL =10mA,VCC =3V 0.6v

VOH Output High-voltage(4)
IOH =-20mA,VCC =5V 4.2v
IOH =-10mA,VCC =3V 2.4v

1. Although each I/O port can sink more than the test conditions (20 mA at VCC = 5V, 10 mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed: 1] The sum of all IOL, for all ports, should not exceed 60 mA. If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test condition.
2. Although each I/O port can source more than the test conditions (20 mA at VCC = 5V, 10 mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed: 1] The sum of all IOH, for all ports, should not exceed 60 mA. If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current greater than the listed test condition.