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I'm encountering an issue where reverse voltage/current on an output pin of an IC is backdriving into the power rail of a board. I would like to add reverse voltage/current protection to the circuit. A simple schottky diode will not work here since the drop of the diode (0.3 V) will reduce the voltage at the Vdd pin to the absolute minimum operating voltage (3.0 V). (See very bottom image)

I've read that a p-channel MOSFET can be used, instead of the diode, to reduce the voltage drop. The drop will therefore be Vds, which is I * Rds(on), which is hopefully smaller.

I'm having a hard time figuring out Vds and Rds(on). How would I determine Vds or Rds(on) from the datasheet? The IC draws 600 uA - 1100 uA of current. So the drain current will be 600 uA - 1100 uA when the transistor is on. Which seems very low.

Does drain current matter as long as Vgs < Vth(max)?

For instance, if I use a IRLML6402 (see top image), the max Gate Threshold Voltage (Vth) is -1.2V. As long as I'm below that threshold, -3.3 V in this case, will drain current matter? What then is Vds and Rds(on)?

Last question, if the p-channel MOSFET does not work, would a load switch IC be better? (See middle image)

I appreciate any help here.

Option 1: p-channel MOSFET

Transistor

App Note: https://www.ftdichip.com/Support/Documents/AppNotes/AN_146_USB_Hardware_Design_Guidelines_for_FTDI_ICs.pdf FET: https://www.infineon.com/dgdl/irlml6402pbf.pdf?fileId=5546d462533600a401535668d5c2263c

Option 2: Load Switch

load switch

https://www.ti.com/lit/ds/symlink/tps22930a.pdf?ts=1599715433170&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTPS22930A

Circuit in Question:

schematic

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  • \$\begingroup\$ What is the load this pin is driving? \$\endgroup\$ – The Photon Sep 10 '20 at 6:06
  • \$\begingroup\$ A MAX4886. The output of the DVI Mux is getting backfed from the receiver of a DVI equalizer. I'm having what appears to be the exact same problem as here: e2e.ti.com/support/interface/f/138/t/… \$\endgroup\$ – mrbean Sep 10 '20 at 6:08
  • \$\begingroup\$ The load is actually a DVI equalizer (not on the board). U1 in my diagram is the MAX4886. Sorry for the confusion. \$\endgroup\$ – mrbean Sep 10 '20 at 6:19
  • \$\begingroup\$ I'm assuming the equalizer uses something like below from TI, however, I'd need to tear apart the equalizer to find out for sure. Either way the receiver typology (sheet 12, figure 9) should be the same, I imagine: ti.com/lit/ds/snls311e/… \$\endgroup\$ – mrbean Sep 10 '20 at 6:36
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Using a Pmos as reverse protection is good to avoid voltage drop across the switch.

To evaluate Vds we should start looking for rdson.

Looking at image 13 in the datasheet Image from the datasheet of the international rectifier

We can see that increasing Vgs will decrease the Rdson, and the resistance starts to increase when high current (5A) starts to flow in the pmos.

Increasing Vgs decrease the current dependence, considering your Vgs (-3.3V) means that you are beetwen these lines, therefore at your current you will have a maximum of 0.1 ohms (minimum of top line).

So a vds of 0.1mV

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