1- In some circuits (Low voltage ones) the body of the pmos is connected to the gnd and nmos to the vdd. i wanted to know the reason behind this technique or in others words what's the idea behind this
the body of the pmos is connected to the gnd and nmos to the vdd
Actually it is the other way round!
- NMOS-body: connect to Ground
- PMOS-body: connect to Vdd
In a standard CMOS process, an simplified sideview of the NMOS and PMOS looks like this:
The NMOS transistor "sits" in the P-substrate and has a p+ Bulk connection. Note how the Drain and Source area of the NMOS are N+. So there are P-N junctions between the P-substrate and these N+ Drain/Source areas. We do not want these diodes to become forward biased. So therefore the P-substrate has to be kept at a low voltage so we usually connect it to ground as that is usually the lowest voltage (actually 0 V). This is done through the NMOS's Bulk (P+) connection.
The same is true in a "reversed" way for the PMOS, the PMOS "sits" in an N-well. That N-well has to be at a high potential to keep all the diodes (N-well to Drain/Source but also N-well to P-substrate) in reverse mode. So we need to connect the N-well to the highest voltage which is usually the positive supply Vdd.
In such a standard CMOS process the P-substrate of the NMOS is shared across the whole chip so all NMOS transistors share the same P-substrate / body. That means that the body of the NMOS must be connected to ground.
The PMOS has it's own N-well and that N-well can also be made larger and shared between several PMOS. In some cases it can be beneficial to connect the N-well not to Vdd but to a lower voltage. This reduces the body effect which increases the threshold voltage. As long as the N-well to Drain/Source diodes remain working in reverse mode, not connecting the N-well to Vdd is OK.
Some processes are more complicated and have an option (called Triple-well) to create a P-well inside the N-well, that then allows us to make NMOS transistors in a sort of "isolated" N-well and then we can also do what we can do with the PMOS body and that is connecting it not to the lowest voltage but a somewhat higher voltage. Again that would reduce the Body effect which is helpful in some situations.
Tying the body to ground or Vdd/Vss changes the threshold voltage. Either raising or lowering it. There are tradeoffs for each. Tying body to soure/drain creates a body diode which can be useful. Tying body to ground removes the body diode. Which can also be useful. Depends on the application.