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I am a student working on a university project. I need help figuring out how I can supply 18 PWM signals to 18 gate drivers, in a 3-phase inverter.

The inverter is built up of 3 half bridges, with 6 transistors per half bridge, 3 on the high side and 3 on the low side.

The gate driver takes a simple HIGH/LOW signal, and has a built in signal inverter for low side. The switching frequency is at 24kHz. I want a I/O expander or a slave microcontroller to supply the PWM, as the main controller sits quite a bit away from the 3-phase bridge. My wish is to turn off some of the transistors when the inverter is running at a low load to improve efficiency.

As far as I am aware, using GPIO pins is out of the question, so I need dedicated PWM pins, my issue is that I don’t have enough PWM outputs.

I have been looking at I/O expanders, but the vast majority I found only gave GPIO. I have also been looking at LED drivers, but I am not sure if they are the best choice.

Another option might be using AND gate logic, supplying the PWM to one input, and the ON/OFF command to the other input. This way I might be able to reduce the PWM to 6 outputs.

Thanks.

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  • \$\begingroup\$ So, basically you are asking what to buy? \$\endgroup\$ – Justme Sep 14 at 11:11
  • \$\begingroup\$ I need at minimum 3 PWM signals, one for each phase. I dont want to use physical delay circuit between turn on and off, so then I need 6 PWM signals. No, I am not asking what to buy, I am asking about possible solutions to my problem, but if you can recommend a IC that does that, feel free to share it. \$\endgroup\$ – Eirik Sep 14 at 11:51
  • \$\begingroup\$ Please reconsider this. The failure modes now expand to whatever is demuxing your PWM pattern resulting in a frozen PWM pattern applied to the inverter \$\endgroup\$ – JonRB Sep 14 at 15:40
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The inverter is built up of 3 half bridges, with 6 transistors per half bridge, 3 on the high side and 3 on the low side.

OK so you basically have a requirement for 6 control lines that need to use PWM. Each PWM control line activates/deactivates 3 parallel MOSFETs yes?

My wish is to turn off some of the transistors when the inverter is running at a low load to improve efficiency.

Then instead of using 18 PWM lines to control all 18 MOSFETs, use extra IO lines to disable some MOSFETs from activating; you'll still use 6 PWM controllable lines but now, instead of an extra 12 PWM controllable lines, you use logic IO lines to disable the 12 MOSFETs that no longer need to play a role.

The number of logic lines could be one i.e. if line=high then the extra 12 MOSFETs still receive PWM drive signals and, if line=low then those MOSFETs are disabled via their respective drivers.

You might want to do this in stages so you might want three extra control lines so that 1 bank, 2 banks or all 3 banks of MOSFETs can be disabled.

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