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I can't see how a resistor placed on a whole other input terminal has anything to do with compensating this input bias. i.e. the input stages are just the gates of transistors of differential stage. In this circuit, one of them is completely connected to ground and has no current to flow FROM or TO the op-amp.

This is saying that the non-inverting transistor has a current flowing from its collector to its gate. (At least the way I understand it.)

enter image description here

The most common compensation involves adding a resistor [R3] to the standard inverting amplifier to cancel out bias currents [output offset]. The compensation resistor [R3] causes a current, on the positive terminal, equal and opposite to current flowing into the negative terminal. So any DC output offset caused by the inverting input is cancelled by the non-inverting input. The value of R3 should be equal to the parallel combination of R1 [Ri] and R2 [Rf].

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    \$\begingroup\$ you assume an op amp has a single transistor, I suggest you search for the schematic of a typical op-amp like a 741 and see what could be wrong in this line of thinking. \$\endgroup\$
    – Juan
    Sep 17 '20 at 0:57
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    \$\begingroup\$ @MahmoudSalah In bipolar, there are two things to worry about at the inputs: the bias current (needed because BJTs have recombination currents) and the offset current (due to the fact that no two BJTs are ever exactly alike in every particular.) Assume both inputs are equal in voltage. Hopefully, the collector currents in the diff-pair will be equal and therefore the bias currents will be equal. The problem comes if you use a 100 k resistor at one and a 10 k resistor at the other (both to ground.) The bias currents will develop different drops. That feeds back to an avoidable output error. \$\endgroup\$
    – jonk
    Sep 17 '20 at 1:16
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    \$\begingroup\$ @MahmoudSalah I'm discussing bipolar, where these currents are far more worth discussing. There should be a current source/sink as part of the diff-pair. (I can't imagine how you've missed seeing it.) This current is split between the two halves of the diff-pair. Equally so if the inputs are at equal voltage (one hopes, anyway.) Given they are BJTs there will be a recombination current required for each half. This must be sunk (or sourced) through something. (Resistance, because that is what we are discussing.) So there will be a drop. A diff-pair can be either NPN or PNP. Not important which. \$\endgroup\$
    – jonk
    Sep 17 '20 at 2:05
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    \$\begingroup\$ @MahmoudSalah: Just to be clear: Bipolar junction transistors (NPN, PNP) have a base, a collector, and an emitter. FETs have a gate, a source, and a drain. In your question, you mix terms for both types of transistor. \$\endgroup\$
    – JRE
    Sep 17 '20 at 5:53
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    \$\begingroup\$ @MahmoudSalah, The assertion in your book, "The compensation resistor [R3] causes a current..." is wrong. A resistor supplied by a current source causes a voltage drop across itself. The op-amp inputs are driven by voltages, not by currents; so we should talk about voltages in the input part of the circuit. \$\endgroup\$ Sep 18 '20 at 6:24
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Sample Bipolar Schematic and Behavioral Description

Let's look at the LM324. It's a bipolar opamp and it is also a lot easier to follow that some. But it is still fairly representative of the basic ideas related to your question:

schematic

simulate this circuit – Schematic created using CircuitLab

You asked about the diff-pair being either NPN or PNP. In this case, it's PNP. It uses a Darlington PNP arrangement, more specifically, with four transistors; \$Q_1\to Q_4\$. The current source, \$I_1\$, is nominally split evenly between the two tail currents (the collectors of \$Q_2\$ and \$Q_3\$, specifically.) So, if the inputs are of equal voltage, we'd expect that there would be \$3\:\mu\text{A}\$ in each tail.

The tail currents are driven into a current mirror, formed from \$Q_8\$ and \$Q_9\$, which means that any current difference will be either be driven outward or sucked inward via the path to the base of \$Q_{10}\$. If the (-) input is lower than the (+) input, then more current is pulled towards the left tail and less current towards the right tail. The diff-pair and current-mirror sections respond to this by sinking the difference as base current via \$Q_{10}\$. This is a very high gain operation and it results in \$Q_{10}\$ pulling its emitter closer to its collector (which is at ground.) That pulls down on \$Q_{11}\$ and therefore also \$Q_{12}\$, causing \$Q_{12}\$ to release its collector a fair bit, allowing the bases of \$Q_5\$ and \$Q_{13}\$ to rise upwards. \$Q_5\$ will soak up current from \$I_3\$ so that the Darlington pair of \$Q_5\$ and \$Q_6\$ will pull their emitters higher, thus raising \$V_\text{OUT}\$.

The overall effect of this is that when the (+) input rises upward with respect to the (-) input, the output rises in response. Which is exactly the desired response.

There is up to about \$100\:\mu\text{A}\$ available in \$I_3\$, of which about half or \$50\:\mu\text{A}\$, is sunk via \$I_4\$. So there will be at most about \$50\:\mu\text{A}\$ available at the base of \$Q_5\$. Given the usual worst-case \$\beta\$ estimates, say \$\beta=40\$ or so, this suggests perhaps a maximum sourcing capability of \$40^2\cdot 50\:\mu\text{A}\approx 80\:\text{mA}\$. The specification says that it is at least \$20\:\text{mA}\$ and typically \$40\:\text{mA}\$, without stating a maximum, which is well-reasoned I think as specifications go.

Some base recombination current is required by \$Q_1\$ and \$Q_4\$. It's modest, because \$I_1\$ isn't a large current. So, nominally, only \$3\:\mu\text{A}\$ is flowing in each tail. Given the Darlington arrangement, the base currents will be on the order of \$1600\times\$ smaller (though we may suggest as little as \$400\times\$ smaller as a conservative limit.) From this, we might suggest at worst, base currents of about \$10\:\text{nA}\$. The specification sheet says that the worst cases are a bit more. But not much more. The reason for this is that they want to deal with cases where the voltage differences are somewhat larger than normal, where one side or the other is moving into saturation mode. So this also is perfectly reasonable.

There is a side-bar worthy of note. Since \$Q_{12}\$'s emitter is at ground, the base of \$Q_{11}\$ is about two \$V_\text{BE}\$'s above ground. That means that the base of \$Q_{10}\$ is about one \$V_\text{BE}\$ above ground. That means the collector of \$Q_{9}\$ is at the same place as the collector of \$Q_{8}\$. And this helps nullify the Early effect that might otherwise be a problem in \$Q_{10}\$. Another good design decision in this circuit. (\$C_\text{C}\$ is a Miller capacitance arranged to set a dominate pole position. Beyond the scope here.)

All of this is just a few very basic circuit concepts and you should make sure, in your own mind, that all of this makes good sense.

Base Currents of \$Q_1\$ and \$Q_4\$

So now we are here. All you have to do is realize that from the circuits there needs to be at least some small base currents in \$Q_1\$ and \$Q_4\$ that are sunk externally towards ground. If you tie one of the bases to ground with a \$10\:\text{k}\Omega\$ resistor and the other input to ground with a \$100\:\text{k}\Omega\$ resistor, then you must realize that there will be a similar, needed bias current so that the diff-pair BJTs can remain in active mode (where they need to be.)

Nominally, in this case, with the base currents about the same but where those currents must be sunk through resistors with values that are an order of magnitude different, it must be the case that there is a small voltage difference at the bases of \$Q_1\$ and \$Q_4\$. Since the emitters of \$Q_2\$ and \$Q_3\$ are tied together, this will mean that the voltage difference results in an exponential difference in collector currents. And that will translate into an output voltage that is offset from nominal by some rather high trans-impedance gain. Feedback can help correct that error, of course. But it's an avoidable problem. So you should avoid it.

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    \$\begingroup\$ Amazing analysis! I will be happy to study it in detail! \$\endgroup\$ Sep 17 '20 at 14:25
  • \$\begingroup\$ "And this helps nullify the Early effect that might otherwise be a problem in Q10. Another good design decision in this circuit." I didn't get what you mean here by the early effect on Q10 actually. \$\endgroup\$ Sep 17 '20 at 23:30
  • \$\begingroup\$ @MahmoudSalah Then that only means you (1) don't understand basics with respect to the Early effect; or, (2) don't understand the diff-pair/current-mirror circuit functionality. Which is it? \$\endgroup\$
    – jonk
    Sep 18 '20 at 1:03
  • \$\begingroup\$ No I think I understand the diff-pair and the current mirror functionality so may be the first choice :D \$\endgroup\$ Sep 18 '20 at 1:04
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    \$\begingroup\$ @MahmoudSalah The Early effect is also known as basewidth modulation (relating to the width of the basce-collector depletion region.) When the collector voltages (the emitters are both grounded) are similar, then the Early effects are also similar in both. So the mirror works right. But if one of the collector voltages is much different from the other, then the effects will be different and the current on one leg won't be the same as on the other leg. The left side is diode-connected, so its collector voltage is fixed. The goal then was to also fix the right side collector voltage. Good idea. \$\endgroup\$
    – jonk
    Sep 18 '20 at 2:28
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In short, every op-amp has a differential amplifier at the input.

enter image description here

Thus, every transistor needs a "base" current (input bias current) to flow to work as the amplifier.

enter image description here

So for example in the inverting amplifier (when \$V_{IN} = 0V\$), this input bias current will cause a voltage drop across the resistor and this drop will be amplified by the amplifier gain. Thus, we have unwanted DC voltage offset at the output.

enter image description here

But we can remove this DC offset if we manage to bring the voltage difference between the inputs to \$V_{+} - V_{-} = 0V\$

We can do this if we choose \$R_3\$ resistor value so that \$R_3 = R1||R_2\$

enter image description here

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  • \$\begingroup\$ A well-written easy-to-read and well illustrated circuit story... Only to note that "every transistor needs a base current" sounds temptingly simple...but it is quite strange for a newcomer to see how a current (without a voltage) exits/enters the op-amp input and enters/exits the ground. The real understanding needs to show the current paths... and to explain why currents flow exactly there... \$\endgroup\$ Sep 17 '20 at 17:44
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    \$\begingroup\$ @Circuitfantasist Yes, I know that it is hard to see the current path. And this requires showing the power supply rails on a diagram. But we usually dos not included the supply rails to increase the readability of the scheme and confuse beginners at the same time. \$\endgroup\$
    – G36
    Sep 17 '20 at 18:22
  • \$\begingroup\$ But one more thing in the bottom right 741 op-amp in your last picture the current is flowing from ground to the inputs does this mean that the emitters of the input stages are pulled below ground in this case or what ? \$\endgroup\$ Sep 17 '20 at 23:20
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    \$\begingroup\$ @MahmoudSalah Did not forget that by default we assumed that the op-amp is supplied from the symmetrical power supply (dual power supply) Vcc = +15V and Vee -15V. i.stack.imgur.com/ieQgq.png And the tail of an input stage (the emitters of the input stages + tail current) are connected to Vee. e2e.ti.com/blogs_/archives/b/thesignal/archive/2012/05/08/… \$\endgroup\$
    – G36
    Sep 18 '20 at 15:54
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    \$\begingroup\$ @Mahmoud Salah, 741 input differential stage (commons.wikimedia.org/wiki/…) is implemented by n-p-n transistors. Their emitters are connected (through complex pull-down circuits) to the negative terminal of negative power supply Vs- (its positive terminal is connected to ground). So the bias current is provided by the negative supply. It exits the positive terminal, enters the base, flows through the pull-down circuits and returns to the negative terminal. You can see this in the simplest differential pair (in principle they are the same). \$\endgroup\$ Sep 18 '20 at 18:54
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It is difficult to understand this otherwise simple idea because of the weird bias technique used in the input differential stages of op-amps. While the classic biasing is by the side of the input (base), here the biasing is implemented by the side of the output (emitters). This is another topic but still to mention that this trick is possible here since the voltage of the common node between the joined emitters is fixed at the differential mode (we cannot use it in the single common-emitter stage since the emitter voltage will follow the base voltage and there will be no amplification).

So, the biasing constant current source makes the transistors adjust their common emitter voltage so that to pass the 1/2 bias emitter current. For this purpose, they adjust their beta times smaller base currents that are produced by the same emitter current source.

But these input bias currents have to go somewhere. And designers have chosen an unusual solution - to pass currents through the input voltage sources. For this purpose, they have to be "galvanic" (conducting); if they are not, they must be shunted with (high)resistance elements to ensure a path for the bias current.

So, this is the situation - input bias currents flow through the input voltage sources and their internal resistances. If there are additional resistors in series (as in the case), bias currents will flow through them as well. You can see this in the simplest differential pair (in principle, this is the same configuration). Let's first consider the case with equal input voltage sources but with no base resistors included (Fig. 1):

enter image description here

Fig. 1. The simplest differential pair with emitter resistor and with no base resistors included (this is not the most beautiful circuit diagram in the world... but it still works:)

The bias base currents Ib1 and Ib2 are represented in Fig. 1 by thin loops in blue. As you can see, they are created by the negative power supply -V. The currents flow through Re and Vin and enter the bases (Re is replaced in the op-amp stage by the complex pull-down circuit).

Let's consider, for example, the current Ib2. Note that Vin2 and -V are connected in series. So, when Vin2 is positive, it is added to -V and the resulting voltage (-V + Vin2) creates Ib2; when Vin2 is negative, it is subtracted from -V and the resulting voltage (-V - Vin2) creates Ib2. So, Ib2 is always entering the base when Vin2 varies between -V and +V. Its magnitude is almost constant in the op-amp stage because Re is replaced by a constant-current element (transistor) with good "compliance voltage".

As a result, bias currents "create", according to Ohm's law V = I.R, voltage drops across resistors. They are constant since both current and resistance are constant. So, we can think of this resistors as of "batteries" with constant voltage that are connected in series to the varying input voltages. Depending on the polarity, these voltages will be added or subtracted to/from the input voltages; thus they "shift" the varying input voltages with some small constant value.

Let's now consider the case with zero input voltages but - one of them "ideal" and the other real. For example, the left input (T1 base) is directly grounded and the right input (T2 base) is grounded through a resistor RB:

Differential pair RB2

Fig. 2. Differential pair with an emitter current sink and a base resistor RB2 included

I have explained this conceptual arrangement in a similar question - Why is the voltage drop created by a current source added?

enter image description here

Fig. 3: Conceptual circuit diagram for an op-amp with input p-n-p transistors (LM 324)

enter image description here

Fig. 4: Conceptual circuit diagram for an op-amp with input n-p-n transistors (LM 741)

We can adjust the voltage "produced" by these "batteries" by changing the resistance (we cannot change the current since it is set by the internal bias current source in the emitters).

In the OP's circuit, a voltage drop is created by I- across R1||R2 that is added to Vin-. To compensate it, we have to add the same voltage drop to Vin+; so we include a resistor R3 with the same value (R1||R2) in series to Vin+.

So, this is a simple electric arrangement of two (voltage and current) sources and a resistor where the combination of the current source and resistor can be thought of as another but constant voltage source in series to the varying input voltage source.

This circuit solution is used in internal op-amp structures (e.g., in Widlar's 709) to "shift" the voltage variations at the output of the input stages.

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    \$\begingroup\$ @Mahmoud Salah, I have drawn the picture above especially for you, to show in a more attractive way the voltage drops and current paths in the case when a base resistor RB2 is added to the right transistor. To make the picture more beatiful and fully symmetric, I have drawn in the left side, in paler colors, the same supply voltage sources V+ and V-. I hope this will not make it difficult for you. It is interesting to me to know if this way of presentation is useful for you. If you still have any questions about voltage drops and current paths, you can ask me; I will answer you with pleasure. \$\endgroup\$ Sep 22 '20 at 14:29
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    \$\begingroup\$ please keep the editing to a minimum, Thanks \$\endgroup\$
    – Voltage Spike
    Sep 22 '20 at 15:18

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