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Am I right that when MOSFETs are connected in parallel for them to share the current equally (See Parallel MOSFETs) they have to be operated in the triode region?

I have an electronic load with 3 parallel MOSFETs and one opamp with 1 shunt in the negative feedback configuration with the opamp driving all 3 MOSFET gates and when in the active region all the current goes through one of the MOSFETs.

What is the easiest way to get a more even current distribution in the active region in this application?

basic electronic load

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    \$\begingroup\$ Likely, use a 20mΩ sense for each one, and drive each gate individually. \$\endgroup\$ – rdtsc Sep 17 '20 at 23:03
  • \$\begingroup\$ What is the minimum voltage drop and maximum current required? \$\endgroup\$ – Bruce Abbott Sep 17 '20 at 23:04
  • \$\begingroup\$ @BruceAbbott, Minimum voltage drop as low as possible, max current - 10A. I was testing at the voltage drop of 36V and the current 1.5A when it was very noticable that all the current was going through one MOSFET. \$\endgroup\$ – axk Sep 17 '20 at 23:28
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Am I right that when MOSFETs are connected in parallel for them to share the current equally (See Parallel MOSFETs) they have to be operated in the triode region?

Yes, that is quite correct but, you could get lucky and have a reasonably even spread. When operated in their linear region not only is the current sharing ambiguous but one device can really hog all the current due to the gate-source control voltage being below the zero-temperature-coefficient point. The knock-on effect of this is that all three devices can blow up within milli-seconds.

Reason: one hogs all the current demanded as by the control circuit and it gets warmer and takes more drain current before the control system can respond and you are in a vicious circle where the device fails rapidly in a hot-spot area inside the silicon. It's called the spirito effect.

Once this happens (and it can happen as quickly as a few tens of microseconds) the remaining MOSFETs (previously not called into action) are "forming a queue" for it to happen to them.

What is the easiest way to get a more even current distribution in the active region in this application?

Well if there is a silver bullet it's three op-amps and three current sense resistors; not elegant but practical; three parallel and independent current sources/sinks.

More on the Spirito Effect in questions and answers on this site: -

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  • \$\begingroup\$ With perfect MOSFET your answer would be untrue, but there are no perfect components, they have variations. I have also heard that this phenomena is called "Wolf pack", the weakest sheep is caught first and then the second and so on... \$\endgroup\$ – Mats Karlsson Sep 18 '20 at 6:14
  • \$\begingroup\$ If there was a god for MOSFETs my answer would also be untrue but there isn't. I'm also thinking that you haven't realized that this can happen to a single MOSFET if operated below the ZTC point @MatsKarlsson. Thermal runaway in a single MOSFET is a fact despite the believed myths about MOSFETs. \$\endgroup\$ – Andy aka Sep 18 '20 at 6:21
  • \$\begingroup\$ Thanks! Didn't know I should have stayed away from low Rds_on MOSFETs for this application to avoid the Spirito Effect. Hope it works for the short duration application I need it for. Hasn't exploded so far :) \$\endgroup\$ – axk Sep 18 '20 at 20:42
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    \$\begingroup\$ It affects the MOSFET saturation region. Most data sheets show graphs if you compare yours with graphs in the other links I provided. \$\endgroup\$ – Andy aka Sep 18 '20 at 21:45
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    \$\begingroup\$ IXYS have a good range and this device looks like it might converge off the graph to the right. However, if you look how much ID changes with temperature it isn't a great deal ratio wise compared to MOSFETs suitable for switching applications. In other words, where ID is greater, the relative change of ID with temperature is not massive. \$\endgroup\$ – Andy aka Sep 21 '20 at 6:08

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