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I want to connect a differential LVDS signal to a DB9. It seems pretty straightforward but I just want a sanity check and after seeing this (Connect SMA to a regular pin/wire), Im doubting myself.

The differential LVDS signal is from 2 SMA ports. I imagine I just need to connect the inner cores to the DB9 input and connect the outer cores to some metal outer part of the db9 (I guess the screw connector or the outer shell of the db9). This will look janky, but I imagine gets the job done?

Any feedback would be appreciated. Thanks!

EDIT: In hindsight, I realized my DB9 has a ground pin I can connect both to, but I did realize also that the DB9s characteristic impedance termination is 100Ohm differential. Does that mean each port is 50 Ohms and I'm good to go or since both inputs from the SMA are 50, that makes my input impedance 25 ohms?

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    \$\begingroup\$ What signal is it? How fast signal is it? Does it require good impedance matching throughout the signal chain? Do you think the DB9 has such high frequency properties? \$\endgroup\$
    – Justme
    Sep 22 '20 at 17:51
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    \$\begingroup\$ Its an 80MHz signal. Its essentially a clock. The DB9 has an impedance of 100 ohms differential nominal. Don't SMAs have an impedance of 50 Ohms? So sounds like there may be an issue there and since its from two ports, does that become 25 ohms? The DB9 input will have no problems at that frequency. \$\endgroup\$
    – bchang32
    Sep 22 '20 at 18:13
  • \$\begingroup\$ What is "the DB9 input" ???? \$\endgroup\$ Sep 22 '20 at 18:26
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    \$\begingroup\$ What is the rise time, or bandwidth, of the 80 MHz differential LVDS clock? Below 4ns for sure? Where does it say that a DE-9 subminiature connector has a 100 ohm differential impedance? I have been under the impression it is nowhere near 100 ohms. \$\endgroup\$
    – Justme
    Sep 22 '20 at 18:29
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    \$\begingroup\$ DB9 input is just the DB9. So I don't know that information of the differential LVDS. I just know that its Frequency is 80 MHz +/- 50 ppm. So I am trying to connect it to a PXIe 6584 (ni.com/pdf/manuals/375593a.pdf) and from its datasheet, it says 100 Ohm characteristic/termination impedance. (I thought it was 50). \$\endgroup\$
    – bchang32
    Sep 22 '20 at 18:42
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You should be able to connect the outer braids from the SMA connectors (presumably connected via co-axial cables) to a pin (or two pins) within the D connector that is connected to ground within the connected equipment.. Can you choose the pin assignments yourself or is this already defined by the equipment you are using? How fast is the LVDS signal?

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  • \$\begingroup\$ You are right regarding the ground Pin. I just noticed up when I re-pulled up the datasheet, but I am concerned about termination now. Does 2 50 ohm SMA ports mean 25 ohm differential characteristic impedance? From my datasheet, my DB9 ports have 100 ohm differential termination impedance. It sounds like it may be fine since differential mode is opposite polarity and 50-(-50)=100? this could be flawed thinking however? \$\endgroup\$
    – bchang32
    Sep 22 '20 at 19:21
  • \$\begingroup\$ The impedance is fine (2 x 50 Ω = 100 Ω). However the PXIe 6584 is only specified up to 16 Mbps so won't cope with your 80 MHz clock signal. \$\endgroup\$
    – Graham Nye
    Sep 22 '20 at 20:40
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    \$\begingroup\$ just out of curiosity and for my learning, how is the impedance 100? Arent they technically coming from two parallel ports? so that makes it 50||50 = 25 or am I approaching and understanding it wrong? \$\endgroup\$
    – bchang32
    Sep 23 '20 at 16:27
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    \$\begingroup\$ The differential signals on your pair of 50 Ω cables should be in anti-phase, i.e. equal magnitude but opposite polarity. When they meet on the 100 Ω terminating resistor they should create a virtual ground 0 V point half way along the resistor. So each side of the signal sees 50 Ω between the co-ax centre and 0 V, as would be the case for a normal 50 Ω termination. Note that from the PXIe 6584 user guide you posted earlier you'll only get a 100 Ω terminator if you chose the correct sub-model (p.15, fig 10, 11, footnote). \$\endgroup\$
    – Graham Nye
    Sep 23 '20 at 20:46
  • \$\begingroup\$ thanks, thats very insightful and easy to understand. Also seems like a very clever way to impedance match. I also imagine the input is isolated from everything else so that its open circuit everywhere else? So if it wasn't anti phase and lets say, one was 1V and the other was -3V, would the virtual ground get shifted and each side see different impedances? (1V seeing 25 ohms and the -3V seeing 75 ohms?) \$\endgroup\$
    – bchang32
    Oct 8 '20 at 18:46

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