# Understanding dynamic range in ADC

I am trying to understand dynamic range for ADCs and I am a bit confused. I have seen two definitions (the second of which I don't fully undertand).

1. The logarithmic ratio in decibels of the maximum to minimum output voltage based on bit depth. For an ADC with a voltage range of 0 V to 5 V and a resolution of 16 bits the smallest output voltage would be $$\\small5/2^{16} = 0.000076V\$$, so the dynamic range would be $$\\small20\cdot log(5/0.000076)=96 dB\$$

2. The ratio of the amplitude of the loudest possible undistorted signal to the noise floor where the noise floor is the quantization error in the most basic case. Wiki states $$\\small 20\cdot log(2^N/1)\$$ where N is the bit depth.

I understand that these both yield the same result but I am a bit confused about where the "1" comes from in the quotient of the second formula.

If the $$\\small 2^N\$$ denotes the total amount of discrete steps that the voltage range is split into for the quantization process I would think that the quantization error (and thus noise floor due to it) would be at most 1/2 of a step (not 1), considering that samples are rounded to the closest discrete step and the greatest offset from any sampled value would be at most 1/2 of the step amount.

Any clarification or insight would be greatly appreciated.

Both of those equations are algebraically equivalent. The first is:

$$\20*log(5/0.000076)\$$ where 0.000076 comes from $$\5/2^{16}= 0.000076V\$$

Substitute that back and you get $$\20*log(5/(5/2^{16}))\$$, which simplifies to $$\20*log(2^{16}/1))\$$ which is your second equation.

From that you can see that the denominator has a 1 and not a 1/2 because your definition of dynamic range was the ratio of the maximum value to the step size.

I would think that the quantization error (and thus noise floor due to it) would be at most 1/2 of a step (not 1),

Using the maximum value (which almost never occurs) doesn't make a lot of sense since you'll seldom see an error that large.

The theoretical limit of an ADC is defined / limited by quantization noise of the LSB, its calculated like that: as a rule of thumb, a real ADC, if done almost perfect, reaches the theoretical value minus 3dB

I would think that the quantization error (and thus noise floor due to it) would be at most 1/2 of a step (not 1), considering that samples are rounded to the closest discrete step and the greatest offset from any sampled value would be at most 1/2 of the step amount.

It's actually ±½ a step, which gives a range of 1 for the noise floor.