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One thing which got me thinking was the lack of NORI in MIPS. Is the argument similar to why there is no SUB for immediate values since it can be simulated with a different instruction? If so, how is it done?

Edit: I mean NOR with immediate values. Sorry about that!

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  • \$\begingroup\$ The reference I found has XORI, so do you mean a specific chip that does not have XORI? \$\endgroup\$ – Justme Sep 26 '20 at 12:09
  • \$\begingroup\$ Oops I got confused for a moment. I was wondering why there is a XORI but no NOR with immediate values. \$\endgroup\$ – Ken Gondor Sep 26 '20 at 12:20
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    \$\begingroup\$ Probably somebody, following the principles later described in H&P, concluded that it wouldn't be used sufficienly often to justify the cost of including it. \$\endgroup\$ – user_1818839 Sep 26 '20 at 14:22
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    \$\begingroup\$ Hmm is H&P the Computer Architecture: A Quantitative Approach? \$\endgroup\$ – Ken Gondor Sep 26 '20 at 14:31
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NOR is quite useful in combinatorial logic functions, but has few obvious uses in program code where there are typically other complete implementations of the sort of operations of which NOR could be a circuit-level building block.

Bitwise operations in program code tend to be more in the nature of bit setting, masking, or XOR toggling, complementing, etc.

Where NOR would be needed in a control application, it's likely to be a slow enough requirement that an additional inversion operation would not be an issue.

Operand code space is almost always at a premium, so will be "spent" first on supporting the operations most likely to be used. NOR (at least with an immediate operand) does not appear to make the cut.

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