I am trying to build an inverting charge pump capable of supplying ~80-100mA at the second stage. Since the PWM signal must source the current, I decided on using a push-pull stage based on this article, which advertises the following schematic:

enter image description here

I build this circuit (only two charge stages; that's enough in my case), but am using Vin = 12v, PWM = 5V, as well as BC327/337 transistors due to the higher current load.

However, loading the circuit causes the transistors to get very hot with the advertised R1/R2 and the CE driver stage. I tinkered with those values but was not able to get a satisfying result. The Vbe of the upper transistor does not allow it into cut-off (I think that's the problem).

I have since looked at different push-pull designs, class AB and D amplifier stages and their biasing using both resistors and diodes, as well as other schematics, but have been unable to come up with a satisfying result.

1. How can I get a clean 0-12V square wave at the collector junctions of Q1/Q3

2. Is there a better way to drive this charge pump with a square wave

I will likely use paralleled LMC7660 drivers in the final circuit, but now I would really like to understand why this isn't working and getting it working


As suggested, I have tried separate CE drive stages for each transistor, but the base voltage of the top PNP (Q2, red trace) appears to be misbehaving. The NPN base voltage trace of Q1, green appears ok:

enter image description here enter image description here

  • \$\begingroup\$ Have you considered using a fully bridged arrangement to your multiplier? You may find it's worth the extra bits. \$\endgroup\$
    – jonk
    Commented Sep 28, 2020 at 16:30
  • \$\begingroup\$ @jonk Without getting the half bridge right first I'm not sure I'd have any hope of juggling a full bridge correctly. \$\endgroup\$
    – namezero
    Commented Sep 28, 2020 at 16:32
  • 1
    \$\begingroup\$ Good point. Well, keep it in the back of your mind, then. Something to consider when you get there. I have back-to-back meetings and classes today, so I'll be away shortly. Otherwise, I'd point you to some posts I've done here that may help. But user287001 has also given you some very good thoughts and appears to want to expand them more fully. So I think you may already be in very good hands. (And nice additions, yourself, I see.) \$\endgroup\$
    – jonk
    Commented Sep 28, 2020 at 16:34

1 Answer 1


There's continuous base current route for Q3. It goes either via Q2 or R2+Q1 and it doesn't stop at all. Q3 conducts at the same time as Q1. ADD: no more that fault, the questioner fixed it in the question.

There's another error. The storage time of common emitter switching transistors makes Q3 and Q1 still conduct a moment at the same time. Storage effect means the Ic continues some time after the base current has been stopped. It can cause no special harm when the states change sparsely, but it causes easily high dissipation when the frequency is 10kHz or more.

I guess you are not going to accept the usual emitter followers due the voltage drop. Emitter follower would be free of the storage phenomena and a common driver would work for them. In common emitter switches you must limit the base current overdrive for ex. like in Schottky TTL, have speeding capacitors, have base discharge resistors and (as you seemingly already have noticed) have separated drivers for the output transistors to prevent the unwanted continuous base current path.

Bootstrapped emitter followers can do the job without too much voltage drop but that's essentially like adding a voltage booster to get more than 12V. That would allow the 1,5Vpp drop caused by the emitter followers and still leave nearly 12Vpp output.

Your own attempt can be developed a little. Here's an example:

enter image description here

The transistors are 2N3904 and 2N3906. V1=0 to 5V squarewave 33kHz, V2=12VDC, the output can pull 80 Ohm resistors to rails within 0,35V, the output swings from 0,35 to 11,65 volts.

Some attention is paid to prevent excessive saturation and you see there's also a speeding capacitor. No Schottky clamp type tricks are used. For higher frequencies you maybe should use it and find higher spec transistors.

  • \$\begingroup\$ Because in the emitter follower the swing would only be 0-11.3V? With separate CE stages to drive each transistor, the top PNP misbehaves again with distorted base voltage (it isn't square anymore). I updated the question with the image \$\endgroup\$
    – namezero
    Commented Sep 28, 2020 at 16:35
  • \$\begingroup\$ Thanks I appreciate your input. I keep tinkering with what I understand from your post for now. \$\endgroup\$
    – namezero
    Commented Sep 28, 2020 at 17:23
  • \$\begingroup\$ Thank you very much for this amazing improvement. This seems to work extremely well. I experimented with the circuit a bit, and the interesting thing to me is the degenerated driver for the high side. Without the degeneration (moving R1 to the base of Q1, it doesn't work anymore). How come a normal CE stage doesn't work well for Q2? I have also tinkered with the resistor values a bit; may I ask how you came up with this particular biasing? \$\endgroup\$
    – namezero
    Commented Sep 29, 2020 at 6:36
  • 1
    \$\begingroup\$ R1 in the emitter makes the collector current of Q1 well predictable and Q1 works fast because Q1 doesn't get saturated. There's no storage effect. and direct base drive also turns Q1 on fast. Q2 has base discharging resistor R2 which wastes a great part of Q1 collector current but keeps the storage time delay of Q2 small enough. The same type drive for low side should be (not tested) well possible, but you need a zener diode to make the level shift from 5 to 12V. \$\endgroup\$
    – user136077
    Commented Sep 29, 2020 at 8:54
  • \$\begingroup\$ (continued) That should be considered if the speeding capacitor appears to be too heavy load for the actual 5V pulse source. \$\endgroup\$
    – user136077
    Commented Sep 29, 2020 at 9:36

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