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schematic

simulate this circuit – Schematic created using CircuitLab

i am starting with designing a 8bit computer and probably turn it into reality , so lets say i start with a 8bit 32kb memory and i want to store some bytes into it in a way i hypothetically know , lets say i have a byte 00010011 where 0001 is the first opcode and 0011 is the address so what should be the correct way to build the hardware that can recognize the 4bits 0001 , what i think is that inverting the 0 , 0 , 0 into 1 and passing all 4 into a 4 input and gate could be the rule of thumb for all 15 opcodes i would possibly need to be there in my 8 bit processor . So is this the correct way to do it

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  • \$\begingroup\$ There is no "the correct" way but your basic approach is one way that can work. You won't get very far with 4 bit addresses though... \$\endgroup\$
    – user16324
    Sep 29, 2020 at 15:00
  • \$\begingroup\$ my purpose is to understand how these nasty machines work and also to gain knowledge about them , so lets frame the question in a better way , will this work , or there is a better design \$\endgroup\$ Sep 29, 2020 at 15:03

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Yes this can work. In general you can recognize any bit pattern by inverting the zeroes while leaving the ones unchanged, and then feeding all those bits into an AND gate. The result will be 1 only when the pattern matches.

There are also other methods. For example invert all the 1s while leaving the zeroes unchanged and feeding all those bits into an OR gate. In this case the result will be 0 only when the pattern matches.

Another approach for matching a 4-bit pattern would be to use a 16:1 multiplexor with the input bits attached to the mux address lines. You place zeros on all the data inputs except for the one address you want to match.

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So is this the correct way to do it

This is a small part of a correct way to do it. In fact, if you have a very regular instruction set (i.e., if the first \$n\$ bits are always the opcode) then you can use a decoder, such as one or more 74xx138.

But processor design is like skinning cats -- there are many ways.

I suggest that you find yourself a book with the title "Computer Architecture" in it -- possibly by looking at university course catalogs and seeing what textbook they use. Such a book will present you with all sorts of ideas you haven't thought of yet.

I also suggest that you find one of the web pages out there that reverse-engineer some of the famous 8-bit processors from the 1970's. These chips were designed when you could barely stuff 2000 transistors onto a chip, so they're designed to get the job done with minimal logic -- and you can either implement your own version of a 6502, 8008 or 1802, or you can draw your inspiration from those chips.

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  • \$\begingroup\$ Please, not the 1802!!! \$\endgroup\$
    – user16324
    Sep 29, 2020 at 16:03
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    \$\begingroup\$ Hey! It's a gem! Pre-RISC, it never even had an instruction set to reduce! That was my first processor, in 1976. COSMAC ELF-II kit, for which I started begging as a Christmas present starting in July or August -- in a family that (A) didn't club together on Christmas presents, and (B) didn't accept requests for Christmas presents. \$\endgroup\$
    – TimWescott
    Sep 29, 2020 at 16:21
  • \$\begingroup\$ Yeah but ... 16 program counters??? :-) \$\endgroup\$
    – user16324
    Sep 29, 2020 at 16:21
  • \$\begingroup\$ You can read the instruction set book for the 1802, close your eyes, and almost see the circuitry. \$\endgroup\$
    – TimWescott
    Sep 29, 2020 at 16:21
  • \$\begingroup\$ Only one program counter at a time, though. \$\endgroup\$
    – TimWescott
    Sep 29, 2020 at 16:22
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It's correct, but inefficient. What you're doing is building the equivalent of a decoder using discrete gates. Use an actual decoder instead:

schematic

simulate this circuit – Schematic created using CircuitLab

If you want to decode opcodes 0000 through 0111, just connect bit3 to the G2A pin instead of G1 (and tie G1 to Vcc).

If you look at the internal logic diagram on page 2 of the datasheet, you'll see the same thing that you drew — the three inverters in the lower left drive the NAND gate in the upper right.

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