1
\$\begingroup\$

I am currently trying to develop a circuit that generates ramp waveforms to control the motion of a piezo linear stage.

Specifically, two waveforms need to be possible to output: a slow ~250us upward ramp with a near-instant downward drop and; a slow ~250us downward ramp with a near-instant upward climb. It does not much matter when each change occurs, the point is that the slower ramp permits the piezo to 'stick' via friction and the faster ramp causes mechanical 'slipping' once per period. As with most piezo stages, this ramp waveform should have a reasonably large peak-to-peak, with 24V being the largest available voltage.

An important requirement for the solution is that the frequency of this ramp can change, since I want to control the speed of the actuator.

Feel free to ask for more images than provided for clarification, they should be easy for me to obtain from the given circuit. So far, I have focussed on outputting the waveform with a slow rising edge, so all included images will be relevant to this. I am assuming that all of this may be extrapolated to the other waveform, as well.

My problem is that when I connect the linear piezo stage to the output of my circuit, the waveform distorts to such a point that the piezo does not move.

The circuit that I have breadboarded is:

Deboo Integrator for ramping

PWM can vary in frequency, which controls the speed of the linear piezo stage.

I have captured waveforms of the functionality at each node before and after the load is connected. Notably, if the unity-gain buffer is excluded, the voltage across the capacitor does not depend on the loading of the circuit while all other nodes become a constant or near-constant high or low voltage. With the buffer, the Deboo integrator circuit is unaffected but the output of the buffer is the same as if the buffer were excluded.

Below, channel 2 measures the input to the buffer, which matches the intended output, in purple. Channel 1, in contrast, shows the output of the buffer (Vout) when the load is connected.

Outputs

I was able to measure the load's (the piezo stage's) capacitance of ~70nF using a DMM, but not the impedance. Following that, I mimicked the load with ~70nF of 'pure' capacitance, and obtained a similar waveform.

My question: How can I output a clean waveform to the piezo so that it actually moves?

The first idea that comes to mind is to add components to the output such that when the linear stage is connected, we have a bandpass filter. This would limit the frequencies at which the stage could operate though, so although I am open to further exploration of this option, alternate solutions are encouraged.

Currently attempted opamp: Texas Instruments TL051CP

Piezo linear stage: Newport AG-LS25

Further clarification: A piezo linear stage uses a piezoelectric material cycling through deformations to mechanically push and pull a linearly-moving material, relative to the surface that the piezo is anchored on.

\$\endgroup\$
28
  • 2
    \$\begingroup\$ Piezos are capacitive and op-amps are limited in their current delivery capability. Those things plus high dv/dt = problems. $$I = C\dfrac{dv}{dt}$$ Is the main issue I would say. \$\endgroup\$
    – Andy aka
    Commented Oct 4, 2020 at 13:42
  • 1
    \$\begingroup\$ What op-amp are you using? And perhaps any piezo specs? \$\endgroup\$ Commented Oct 4, 2020 at 15:51
  • 1
    \$\begingroup\$ @kanoo I down-voted your question because it fails to show any effort on your part to characterize the slip-stick thresholds for current and frequency. If you add some more data then a solution can be made. such as this tinyurl.com/y55sb5zw which includes square wave oscillator with bias adjustment for symmetrical duty cycle (50%) and sawtooth discharge and <1A to drop to <1V . This can be tuned to any spec, but until you add specs, the question is vague \$\endgroup\$ Commented Oct 6, 2020 at 16:33
  • 1
    \$\begingroup\$ I stated that I think your signals have an average DC offset because of the illustration: Is the signals from the generators as illustrated? going from 0V to positive only? or do they generate positive and negative going waveforms? What is the scope set to and where is 0V on the pic? I would have probably just used a 555 timer set up as sawtooth generator. (also probably cap coupled to a voltage gain op-amp to a half-bridge driver chip, to handle the piezo current, with a parallel 'flyback' inductor across the piezo, for 'retrace' kick). \$\endgroup\$ Commented Oct 6, 2020 at 18:06
  • 1
    \$\begingroup\$ Yes, that is what I needed, and what I thought. If the generators ore 0 to positive, and no negative 'half', then the inductor would not work without either cap coupled or DC offset feedback to null out DC current through the inductor. \$\endgroup\$ Commented Oct 6, 2020 at 18:08

2 Answers 2

1
\$\begingroup\$

The solution to get the piezo moving was to go simpler - here is a passive integrator, where the piezo serves as the capacitor (I forgot to change capacitance and FET part number in the schematic - ultimately, it doesn't particularly matter as long as an appropriate resistor is selected for the application).

schematic

simulate this circuit – Schematic created using CircuitLab

From here, appropriate direction-control and PWM charging/discharging transistors may be included to control the direction of the waveform which, admittedly, isn't perfectly triangular, but for a stick-slip piezo is good enough; there is a faster edge and a slower edge.

\$\endgroup\$
1
\$\begingroup\$

You could use the class AB amplifier with some big transistors.

simplified schematic of generic class AB amplifier

Image source: Electronics Tutorials - Class AB Amplifier

A bipolar transistor has this embedded feedback, it's Vbe is pretty much constant, so it will provide almost any current (because of high beta) to follow the voltage on the input.

\$\endgroup\$
12
  • \$\begingroup\$ To drive 10A spikes you need more than 1 stage of PNP with 200W peak power \$\endgroup\$ Commented Oct 5, 2020 at 0:26
  • \$\begingroup\$ Well, i did exactly that in a piezo application several years ago. Big transistors and I had to test several of them- some were not fast enough. Cooling is also an issue. But totally doable. \$\endgroup\$
    – user76844
    Commented Oct 5, 2020 at 0:31
  • \$\begingroup\$ The cooling issue was likely due to insufficient gain to lower the resistance of the transistor and discharge time unless you had large Joules to dissipate \$\endgroup\$ Commented Oct 5, 2020 at 6:34
  • \$\begingroup\$ Actually IV is a sufficient explanation. The pulse frequency is high, it's not like a switching device- current and voltage are never zero \$\endgroup\$
    – user76844
    Commented Oct 5, 2020 at 15:09
  • 1
    \$\begingroup\$ I was thinking the same thing. I also think you would add a 'flyback' inductor across the piezo, that will provide the high current reversal at the 'slip' slew. Due to the PWM configuration, I think the avrerage DC component of the waveform is not 0V, so a capacitive coupling at the output, before the inductor, or modify the circuit to reference the avg DC offset to 0V. I don't have the knowledge (or the piezo specs) to calculate the inductor value. (this is very similar to old CRT deflection circuits). This should allow you to use more reasonable drive stage components. \$\endgroup\$ Commented Oct 5, 2020 at 17:12

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.