I want to implement a data register to store up to 256 8 bit chunks (VHDL). I also need to to be able to access and modify these values from multiple vhdl modules. One module will access the register to modify the values from the spi port. Then another module that implements the EPP protocol to communicate to the PC will shove out the data.
Right now I just have the signal that implements the register in one of my modules:
type type_dataRegisterWithAddress is array (0 to generic_numRegisters-1) of std_logic_vector(7 downto 0);
signal dataRegister: type_dataRegisterWithAddress;
I am not sure of the technical details of a register but I am just storing logic vectors and accessing with a to_integer(address)
.
I do not know how I would share this to another module as I can't just put in the port map since it is an array. Even if it was in the top level module I still do not know how I would share it.
What is the best method to create some registers that can be accessed from many modules?
EDIT: To answer some of Dave's questions...
I kinda wanted to implement it in code like I am doing since this is a small storage and I am not actually going to use 256, it is just that the EPP interface can have 256 addresses. But you do bring up a good point.
I am using the Basys2 250k board which has 72Kbits of dual-port block ram. I have only ever used it using the IP Core function in this tutorial/module. I think this may be the best thing to use.
Now that I have the correct term. What is the your personal approach to shared memory?