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I'm stuck at overcurrent protection for SCT3160KL using UCC21732 (or UCC21750, trying to see differences in Desat and Overcurrent protection). This is my circuit enter image description here

Waveforms enter image description here

I see that there is a lot of oscillation in the sense current. I put an RC filter with minimum cutoff frequency = 10 times switching frequency (500 kHz), and keeping R53 within 100 ohms, It does not seem to work. What can I do further??

(I chose R54 (sense resistor) as 120 mOhms since the drain current maximum is 17 A).

EDIT 1:- I changed V32 to two voltage sources in series so that it resembles a double pulse test. After reading DKNguyen's answer I changed my circuit a little. Here it is:-

circuit-2 Now I tried to change my RC filter values so that the phase lag between sense voltage and OC voltage is reduced. Here is the waveform:-

waveform-2

Originally I had kept L1 as 1 mH, but I understood that it was too big and changed it to 1 or 2 uH.

My problem is that the OC voltage is going above 800mV (the tripping voltage) when detecting overcurrent. How can I rectify this?

Also, supposing here in this waveform we assume OC trip voltage is correct, and so the FLT_N pin is going low. Then I wouldn't be able to see the other pulse right? I had given a gap of 100 microseconds between the 2 pulses, and I've simulated it for 120 microseconds.

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  • \$\begingroup\$ What is the threshold level for the OC input? \$\endgroup\$
    – Andy aka
    Oct 11, 2020 at 7:25
  • \$\begingroup\$ @Andyaka 0.7 V typically. \$\endgroup\$
    – SM32
    Oct 11, 2020 at 7:33
  • \$\begingroup\$ Is L5 an actual component or a parasitic? Because if it is an actual component, why isn't R54 ground referenced? The IC is comparing the current sense voltage to a ground-referenced voltage reference, but yours is floating on top of L5. \$\endgroup\$
    – DKNguyen
    Oct 11, 2020 at 7:34
  • \$\begingroup\$ It looks like it works just fine to me then. \$\endgroup\$
    – Andy aka
    Oct 11, 2020 at 7:34
  • \$\begingroup\$ @DKNguyen I added L5 to account for parasitic inductance. Even if I remove L5 it gives similar waveforms, just minor changes in the delay time between /FLT and OC. \$\endgroup\$
    – SM32
    Oct 11, 2020 at 7:38

1 Answer 1

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Your circuit is working as intended. It is not an oscillation. Your inductance, L4, is very large so it takes a long time for current to build up, longer than your MOSFET actually conducts for.

Every time you the MOSFET blocks, the current circulates around the inductor through D1 and you turn on the MOSFET again before the magnetic field in the inductor has completely collapsed and the current stops. Since the previous current is still flowing through the inductor when the MOSFET starts conducting again, you continue to build up energy in the magnetic field it continues to increase with every cycle rather than resetting and climbing back to the same point.

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  • \$\begingroup\$ If I decrease L4 the /FLT pin is going low at 3 microseconds...how do I check if it is correct then? Or do you mean to say that since this is a gate driver design, I shouldn't have to worry about the actual L4 value since it won't be there in the real hardware? \$\endgroup\$
    – SM32
    Oct 11, 2020 at 7:54
  • \$\begingroup\$ What do you mean? You asked about the oscillation. I told you it is not an oscillation and explained what it was. At 120mOhms and 0.7V, it should trip at about 5.5A and your graphs indicate it trips at 6A. What makes you think anything looks incorrect? Isn't that enough to know it is correct? It's tripping at the current you designed it to trip at. If you want a simpler waveform to read you can just reduce L4 or replace it with a resistor, but everything looks just fine to me. \$\endgroup\$
    – DKNguyen
    Oct 11, 2020 at 7:57

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