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I'm creating a 16-bit ALU that has to perform logical AND, logical OR, addition, subtraction and rotate left one bit. I have everything working perfectly except the rotate left one bit. I think I need to implement this at the 16-bit level instead of inside the 1-bit ALU, which I've chained together to create the 16-bit ALU. Any advice on how to do this would appreciated. I'm thinking it has something to do with the carry out bit, but I can't quite figure it out.

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    \$\begingroup\$ To have an answerable question, you'd need to show the current architecture of your ALU and its data paths. This should implicitly demonstrate how you are chaining together 1 bit ALU's to create a 16 bit one, which sounds at the very least challenging in its own right... \$\endgroup\$ Oct 12, 2020 at 0:46
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    \$\begingroup\$ It's just a lane-change operation. How hard is that? Often, that's already required for other reasons, anyway. But yeah, you can use the adder to do this, too. \$\endgroup\$
    – jonk
    Oct 12, 2020 at 3:14
  • \$\begingroup\$ As others have mentioned, there is no difference between a left shift and x + x. However a more useful function is a right shift which cannot be emulated by a subtraction. \$\endgroup\$
    – slebetman
    Oct 12, 2020 at 8:58
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    \$\begingroup\$ Just be clear on the difference between shift left and rotate left! \$\endgroup\$
    – user16324
    Oct 12, 2020 at 14:14

1 Answer 1

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The simplest thing is to just add the input number to itself. Doubling a number (multiplication by 2) is equivalent to a left shift in binary. In other words, select ADD as the ALU operation, and feed the input value to both inputs of the ALU. If you do add-with-carry, then the carry bit will automatically get shifted into the LSB. In either case, the carry-out will be the MSB of the original input number.

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  • \$\begingroup\$ That would be a left shift not rotate, or 17-bit rotate-through-carry, like x86 rcl. A 16-bit rotate left (like x86 rol) would need to feed the carry-out directly into the low bit, as well as into the carry flag. (To be fair, some ISAs only have rotate-through-carry and just call it rotate, e.g. AVR where it uses the ADC opcode.) And yes, adc same,same is equivalent to rcl reg by 1. To emulate rol reg, you could add reg,reg / adc reg,0 to left shift and then add the carry-out to the zero you shifted in. \$\endgroup\$ Oct 12, 2020 at 12:47
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    \$\begingroup\$ @PeterCordes: If that's what you want, it just takes a few more gates to route the MSB of the input directly to the carry-in of the ALU. Or you could simply run the two-instruction sequence "add register to itself" followed by "add-with-carry #0". \$\endgroup\$
    – Dave Tweed
    Oct 12, 2020 at 13:06
  • \$\begingroup\$ Yes, agreed. But since that wasn't obvious to the OP, it's probably best to be clear about exactly what rotate you're implementing. \$\endgroup\$ Oct 12, 2020 at 13:10
  • \$\begingroup\$ @PeterCordes: Actually, the answer is intentionally vague, just like the OP's question is. Without details about the actual ALU circuit or the datapath in which it is embedded, it's difficult to be specific without creating possible confusion. I'm just providing a hint about how the ALU's carry logic can be used to shift the data to the left, just as the OP suspected. \$\endgroup\$
    – Dave Tweed
    Oct 12, 2020 at 14:09

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