I am designing a device which drives I/O with circuits powered off an isolated power supply. To protect against ESD shocks, I placed bidirectional TVS diodes with 60 V forward voltage (SMBJ60CA). I connected one end to the I/O net and the other to chassis ground.
Just before sending this design to layout, it struck me that the reference for the I/O (let's call it ISO_GND) and the chassis reference (GND) may be at very far-apart galvanic levels, which could easily cause a potential difference > 60 V. If I'm not mistaking, this could cause arbitrary biasing of the diodes.
Is this something to worry about? What is a better way to implement ESD protection?