# Choosing the right opamp for biasing a square wave

I am trying to bias a 1MHz, Vpp = 1V, bipolar square wave signal coming from an opamp.

I want to bias it by 1V, the 1V bias (Vcm) is available at an ADC's output port.

I am thinking about using this circuit with a rail to rail opamp:

I know I will get an inverted signal, but I can simply invert it again.

1. How do I choose the correct capacitor value?
2. What voltage do I need to apply to the rails?
3. Do I need a resistor between the ADC's Vcm output and the opamp's Vcm input?
4. I will need an opamp with a gain bandwidth product of 10 times the square wave frequency, right?
• Your circuit is wrong - it won't work. Commented Oct 14, 2020 at 11:52
• What would be the solution? Commented Oct 14, 2020 at 12:37
• You already asked about this problem yesterday at Single ended Signal to a pseudo differential one Do not create multiple posts about the same problem, instead edit your existing question. Additionally, part recommendation questions are off topic here to begin with. And you should not have three active questions about the same problem... Commented Oct 14, 2020 at 13:37

Technically, you don't need the opamp at all; your capacitor, feeding it to a higher-than-source impedance resistor to your reference voltage does exactly that.

So, if the original source of your square wave can drive your load that you plan to attach to Vout, this simple CR high pass filter totally biases the square wave to whatever you want.

The capacitor value would hence be chosen to be large enough to put your cutoff frequency below 1 MHz. That depends on the resistor.

You could bias it with a resistor to a +1V source and coupling capacitor, then buffer it with a voltage follower (no inversion). Your circuit is not that.

However to get a good fidelity square wave you need a high slew-rate amplifier with a large GBW product. Maybe 50MHz and 20 or 30V/us minimum. Also you cannot expect the amplifier to perform well right at the limits of output, so it would be better to give it +2V if you expect an output voltage of 1.5V peak. Even if it is advertised as rail-to-rail input and output (since it's a voltage follower, the input also has to have a common-mode range that approaches the positive rail).

• OK thank you so I have to feed the 1V into a resistor which is connected with a coupling capacitor to ground, right? At the junction between capacitor and resistor I will use an opamp? Commented Oct 14, 2020 at 19:29
• Yep. Basically, you'd append an opamp buffer to my answer and get Spehro's answer (which is better in that way). By the way, don't use an opamp for this - if this is a clock for clock purposes, you care about low jitter and thus high rise rates, not about linearity. Look for clock buffer ICs. Commented Oct 14, 2020 at 20:29
• Cap from signal source to non-inverting amplifier input. Resistor from non-inverting input to +1V. Op-amp output back to inverting input. And Marcus is right, this is far from ideal as a.clock buffer circuit. If you look inside a function generator you’ll find very high performance op-amps used to minimize jitter and still allow adjustable amplitude and offset. Commented Oct 14, 2020 at 21:15
• Thanks for the help and information! Commented Oct 14, 2020 at 21:28
• What would be the easiest way to make this signal to a differential one? I found this LMH6551Q differential ADC. But the recommended circuity looks quite complex. Is there an easier way with good results to do this? Commented Oct 14, 2020 at 21:37