I have been trying to amplify the output of this near field LC receiver with different OP AMP types and configurations.

All the circuits I've tried have either had a really high offset at the output, and don't amplify the signal, or just give completely wrong outputs (several orders of magnitude above supply voltage).

How would you go about designing an amplifier for this circuit ? I don't want to dampen the Q of the circuit much at all while amplifying the voltage across the capacitor, setting the gain with a potentiometer. Rail-to-rail operation would be nice too, since I only need the positive portion of the signal.

• More details need: voltage level produced min and max, operating frequency etc.. The simulation you have done is meaningless to me. Give more real information. Oct 18, 2020 at 19:51
• Frequency is only 17KHz. Maximum voltage depends on the range, I'm really only interested in amplifying small voltages to get a longer range, in the mV to µV range.
– Ryan
Oct 18, 2020 at 19:58
• Forget the "really high offset". That's not a problem : simply AC couple the output.
– user16324
Oct 18, 2020 at 20:08
• I have tried that, for some reason the AC signal is just not amplified at all. In fact it is significantly weaker. I can't post every circuit I've tried, I'm just looking for advice as to how this should be done properly since I can't seem to be able to do it.
– Ryan
Oct 18, 2020 at 20:20
• Then post just one and ask if anyone can see the problem with it.
– user16324
Oct 18, 2020 at 21:02

This circuit/sensor uses 81pF as the resonant cap. Thus we can have substantial input capacity of the amplifier (several PF) without serious upset to the energy storage and tuning. To avoid dampening, the interface needs to have impedance >> the reactance of 1Henry at 17,000 Hertz, which is about 100,000 ohms.

First, lets bias that sensor to VDD/2 approximately.

Use two 1 MegOhm resistors in series, running from VDD to Ground. Place 100pF cap from the midpoint to your sensor. We now have VDD/2 voltage plus your sensor. The interface resistance is 1M || 1M or 500,000 ohms, which supports a Q=5 for your sensor. That is about what I observe (the rate of buildup of the voltage) in your simulation. You can use 3.3M or 10Meg ohms (two in series) if you wish.

Get yourself some opamp that uses FET (CMOS) technology. Read the datasheet, or examine the INPUT BIAS CURRENT for room temperature operation. The input bias current will be picoamps ( << 1 nanoAmp, may be the spec value) for a CMOS opamp. Such low input bias currents ensure the VDD/2 voltage divider will continue to define the DC input voltage.

Ensure the opamp works on 0/+5 volt rails. Because of how this circuit (to be detailed below) operates, you do not require rail_rail input nor rail_rail output, but such performance will not degrade the performance. Do not use micropower (1uA Iddq) opamps; the speed will be way too slow.

Connect the Vin+ of the opamp to that 1Megohm + 1Megohm midpoint.

From Vin- of the opamp to Ground, install a 1Kohm in series with 0.1uF cap. This series network is DC_blocking, with negligible effect at 17,000Hz. [ hmmmm the time constant of R * C = 1e+3 * 1e-7 = 1e-4 or 100uSec, which is 1,600 Hertz, so yes has negligible effect.]

From Vin- to Vout of the opamp, install the Feedback network --- use (initially) a 100,000 ohm resistor. Even if the opamp has only 1MHz UGBW, you should observe a gain of 1,000,000 / 17,000 = 55X stronger signal on the opamp output.

An opamp with UGBW higher, such as 3MHz or 10MHz, should provide 100X gain (40dB).

And the output will be biased at VDD/2, so first verify the output DC is (near) VDD/2, then switch the scope to AC coupling, and verify the expected gain.

I've suggested the 1Kohm and 100Kohm resistors be used to set the gain, because high values will allow phase_shifts in the opamp's feedback path, which may cause ringing or oscillation. You don't need that bother.