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In the first image, the left part is a Colpitts oscillator. It works at 40 MHz, output 300mV maximum. The right part is a common emitter amplifier. Its gain is 10. The two transistor are s9018 - bandwidth is 400 MHz,hfe is 130.

I used a 100MHz bandwidth oscilloscope to measure its output. It does not get amplified at all - the output is lower.

I don't understand why does the oscillator output decreases when the frequency increases.

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    \$\begingroup\$ Yeah. When I'm working on a 40 MHz oscillator, the very first thing that comes to mind about building it is to use a solderless breadboard. NOT. The first thing to do is to build that in a proper way. Perhaps try the Manhattan style? \$\endgroup\$ – jonk Oct 27 at 17:38
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    \$\begingroup\$ Its gain is 10 at low frequencies : designing an amplifier fo a specific gain at 40MHz is not something to tackle in a comment, but start with a capacitor across R7 and an RF choke or a 40 MHz parallel tuned circuit in place of R4. Also, dead-bug it on a piece of copper clad PCB : breadboard WILL NOT do. \$\endgroup\$ – Brian Drummond Oct 27 at 17:38
  • \$\begingroup\$ Expanding on @BrianDrummond comment, use a class C amplifier topology for RF, not class A. \$\endgroup\$ – Aaron Oct 27 at 17:40
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    \$\begingroup\$ " i don't understand why does this oscillator output decreases when frequency increases" breadboards have a lot of parasitic capacitance. What happens to a signal passing through a capacitor as frequency goes up? \$\endgroup\$ – Aaron Oct 27 at 17:47
  • \$\begingroup\$ I thought parasitic capacitance in the breadboards are too small to affect it,I'll try it on a pcb or like Manhattan style. \$\endgroup\$ – sa as Oct 27 at 17:58
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The amplifier design will have limited bandwidth and the gain at 40MHz will be significantly less than at low frequencies.

The main culprit will be the roll-off due to capacitance at the collector of Q2.

For a quick calculation, you can ignore the output resistance of the transistor and assume that it is defined by the physical resistor (1k in this case). You can also ignore any inductance of the wiring although that could be significant at higher frequencies.

The usual way to define the frequency response of a circuit is by way of the 3dB response.

This is the frequency at which the response will be 3dB down (ie 0.707) of the response at low frequencies and will be when the reactance of the capacitance is equal to that of the resistance.

For this circuit that will be f = 1/(2piR*C).

The resistance is 1k Ohm, the capacitance is probably about 20pF - every terminal in a proto-board is going to be about 5pF with more from the transistor.

The resulting frequency will be 7.96MHz. Above this frequency, the output will drop by a factor of two for each octave. Since 40MHz is about 2 octaves higher this will drop it by a factor of 4 more, so the output will only be about 1/6 of the low-frequency value.

To make things worse we have not yet accounted for the capacitance of the scope probe;

A x10 scope probe will have a capacitance of 15-20pF (My Siglent probe is specified at 18-22pF. If you use a x1 scope probe it could have 100pF.

Assuming you use a x10 probe the output will drop by another factor of two so the output will only be 1/12 of the expected value. That stage was intended to have a gain of 10 but in actual fact will attenuate the signal slightly.

To improve things there are a number of solutions:

  1. Improve the construction to reduce the capacitance

  2. Reduce the value of R4.

  3. Replace R4 with a tuned circuit to resonate with the existing capacitance and so cancel its effect. This is a very common solution for RF amplifiers where only limited bandwidth is needed. If wideband amplification is needed a combination of resistors and inductors is used, often referred to as "peaking inductors".

  4. ensure that the transistor you are using has good gain at the frequency of interest. Most modern general purpose transistor will have Ft of 200-300Mhz. Ft is the frequency at which the current gain has dropped to unity.

With a 300Mhz transistor running at 40Mhz the current gain will have reduced to about 8; it can still have gain at that frequency but it will be lower than at low frequencies.

  1. As @Frog indicates in his answer a cascade circuit can help avoid the effects of the collector base capacitance. However the main effect in this circuit will be to reduce the loading on the oscillator stage rather than an effect on the voltage gain of Q2.

  2. Add another transistor as an emitter follower to minimize the effect of the load on the sensitive collector node.

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Perhaps consider a cascode or base-coupled amplifier. Breadboard issues aside, the collector-base capacitance of Q2 will reduce the voltage gain at high frequencies. A cascode arrangement avoids this, but it's typically used with a split supply rather than the single rail that you are using - I don't know if that's feasible for your application.

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