How to create/optimize a matching circuit in the middle of a PCB with a network analyzer?

Question

I have a PCB with an SMA connector as only input. The block diagram of the circuit looks like:

I would like to update the L-match for optimum matching (L, C1, C2 at 915 MHz).

I connect a VNA to the SMA and measure Ztot=26-j17. Then I disconnect L and C1 (=L-match and "B" are disconnected) and I measure only Za.

1. With this information, how can I redesign the L-match? (The first instinct is Ztot=Za+Zl+Zb or Ztot=Za//Zl//Zb. But it doesn't seem so trivial)
2. When measuring Za, instead of removing C1 and L, should I short C1 instead? I would like to avoid putting 50 Ohm there because a) I don't have precise 50 Ohm resistors, b) I would need to consider the package and parasitics as well.

PS: A is "ideally" a short: It consists of ac coupling caps, RF switches, PCB traces and artificial transmission lines (delay lines). B is mainly an LNA input (but also has lots of PCB traces, lumped components etc).