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I have simulated a 48 V to 12 V buck converter with LISN in LTspice. However, CM and DM EMI is way below CISPR limits. I want to simulate a real world converter. How can EMI be increased?Cm and DM EMI in dBuV

[2]Entire LTSpice circuit

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    \$\begingroup\$ Practical EMI performance is completely affected by the PCB design as well. And it appears that your model does not include the PCB-design-related components (stray inductances, DC resistances of reactive components, etc.). \$\endgroup\$ Commented Oct 30, 2020 at 8:05
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    \$\begingroup\$ "How can EMI be increased?" This is a very strange question to ask. \$\endgroup\$
    – winny
    Commented Oct 30, 2020 at 8:23

1 Answer 1

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The hint referred to your driving the NMOS with 48 V, and grounding both ends of C6. While things don't blow up in SPICE world, they just might not be working as intended.

If you want to see effects of non-idealities, then that's what you have to add to your schematic (see Rohat Kılıç's comment. What you have there is (let's say) a quasi-ideal buck stage. In practise, you'll have trace inductance, parasitic capacitors, non-ideal elements. This is a potential candidate:

test

I've only added some trace inductance and some parasitic capacitance, yet the results are already seen in the output, drain, and gate voltages. Things complicate here because the models in SPICE world are not the exact counterparts of their real-life cousins. For example, despite having the parameter Vp as an aid for soft reverse recovery, it's a bit of a rara avis in diodes, while the VDMOS intrinsic model lacks it. These will influence quite a bit the result, since they act as a natural damping coefficient. So, depending on how imperfect you want to make your schematic, you have to add extra elements, otherwise everything is silky smooth.

One more thing to mention: since you're performing an FFT, it would help if you set -- at the very least -- .opt plotwinsize=0. That disables the waveform compression, which causes artifacts and false FFT results. You could rely only on the click given by V2, but that would only count for the natural sampling frequency. Since you're looking for EMC, then you'll have to impose a timestep at least 5-10 times smaller than the switching frequency, in order to have a good resolution of the harmonics involved. The .raw file will get large, but you can circumvent that by using the .save command.

If you want to take a closer look, here's the source, save it as .asc:

Version 4
SHEET 1 956 680
WIRE 176 -96 176 -128
WIRE 464 -96 464 -128
WIRE 96 64 -48 64
WIRE 176 64 176 -32
WIRE 176 64 160 64
WIRE 208 64 176 64
WIRE 352 64 304 64
WIRE 448 64 416 64
WIRE 464 64 464 -32
WIRE 464 64 448 64
WIRE 560 64 464 64
WIRE 704 64 640 64
WIRE 720 64 704 64
WIRE 752 64 720 64
WIRE 848 64 816 64
WIRE -48 144 -48 64
WIRE 224 144 224 112
WIRE 848 144 848 64
WIRE 224 160 224 144
WIRE 704 160 704 64
WIRE 464 176 464 64
WIRE -48 288 -48 224
WIRE 464 288 464 240
WIRE 464 288 -48 288
WIRE 704 288 704 224
WIRE 704 288 464 288
WIRE 848 288 848 224
WIRE 848 288 704 288
WIRE 80 336 -16 336
WIRE 224 336 224 224
WIRE 224 336 160 336
FLAG -16 416 0
FLAG -48 288 0
FLAG 720 64 out
FLAG 176 -128 0
FLAG 464 -128 0
FLAG 448 64 d
FLAG 224 144 g
SYMBOL voltage -48 128 R0
WINDOW 123 24 118 Left 2
WINDOW 39 24 140 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMATTR Value2 Rser=0.1
SYMATTR SpiceLine Cpar=220u
SYMBOL pmos 304 112 M270
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL voltage -16 320 R0
WINDOW 123 24 118 Left 2
WINDOW 39 24 140 Left 2
SYMATTR InstName V2
SYMATTR Value pulse 0.2 11.5 1u 25n 50n 5u 10u
SYMBOL FerriteBead2 224 192 R0
WINDOW 3 21 22 Left 2
WINDOW 123 21 44 Left 2
WINDOW 39 21 66 Left 2
SYMATTR InstName L1
SYMATTR Value 10n
SYMATTR Value2 Cpar=0.2p
SYMATTR SpiceLine Rpar=10k
SYMBOL res 176 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL FerriteBead2 128 64 M90
WINDOW 0 -24 -9 VRight 2
WINDOW 3 26 -10 VRight 2
WINDOW 123 44 -43 VRight 2
WINDOW 39 64 -40 VRight 2
SYMATTR InstName L2
SYMATTR Value 20n
SYMATTR Value2 Cpar=0.5p
SYMATTR SpiceLine Rpar=10k
SYMBOL FerriteBead2 384 64 M90
WINDOW 0 -24 -9 VRight 2
WINDOW 3 26 -10 VRight 2
WINDOW 123 44 -43 VRight 2
WINDOW 39 64 -40 VRight 2
SYMATTR InstName L3
SYMATTR Value 20n
SYMATTR Value2 Cpar=0.5p
SYMATTR SpiceLine Rpar=10k
SYMBOL schottky 448 240 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ind 544 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 123 -17 56 VBottom 2
WINDOW 39 -39 56 VBottom 2
WINDOW 40 -61 56 VBottom 2
SYMATTR InstName L4
SYMATTR Value 22u
SYMATTR Value2 Rser=0.1
SYMATTR SpiceLine Cpar=2p
SYMATTR SpiceLine2 Rpar=10k
SYMBOL cap 688 160 R0
WINDOW 123 24 78 Left 2
WINDOW 39 24 100 Left 2
SYMATTR InstName C1
SYMATTR Value 220u
SYMATTR Value2 Rser=50m
SYMATTR SpiceLine Lser=2n
SYMBOL res 832 128 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL FerriteBead2 784 64 M90
WINDOW 0 -24 -9 VRight 2
WINDOW 3 26 -10 VRight 2
WINDOW 123 44 -43 VRight 2
WINDOW 39 64 -40 VRight 2
SYMATTR InstName L5
SYMATTR Value 20n
SYMATTR Value2 Cpar=1p
SYMATTR SpiceLine Rpar=10k
SYMBOL cap 192 -96 M0
WINDOW 123 26 78 Left 2
SYMATTR InstName C2
SYMATTR Value 5p
SYMATTR Value2 Rser=10m
SYMBOL cap 480 -96 M0
WINDOW 123 26 78 Left 2
SYMATTR InstName C4
SYMATTR Value 5p
SYMATTR Value2 Rser=10m
TEXT 480 336 Left 2 !.tran 1m startup
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  • \$\begingroup\$ Ok,but what is the use of ferrite bead in the circuit?Is this for increasing the parasitic elements? \$\endgroup\$ Commented Nov 3, 2020 at 5:31
  • \$\begingroup\$ @catharineaji Yes, that's the whole point of "If you want to see effects of non-idealities, then that's what you have to add to your schematic". \$\endgroup\$ Commented Nov 3, 2020 at 8:46

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