# How to understand mosfet capacitance characteristics?

I am looking at the following capacitance characteristics of the n-mos FDS6680A (spice model):

How do I understand this graph regarding the conditions? Let's take Ciss for example.

• From what I understand, Ciss = Cgs + Cgd with Cds shorted. So how can Ciss in the graph then vary as a function of Vds if Cds is shorted? Vds should by definition be 0V.
• It seems for the graph Vgs is fixed at 0V. How then does the f=1MHz come into play? Which voltage is alternating and with which amplitude?
• "shorted" to AC signals does NOT imply a short at DC. Likewise Vgs=0V is a bias : you can superimpose a small AC amplitude on that without invalidating it as a condition.
– user16324
Oct 31, 2020 at 11:33

Brian Drummond's comment nailed it, but I thought it was worthwhile to expand on it to fully answer both of your questions.

From what I understand, Ciss = Cgs + Cgd with Cds shorted. So how can Ciss in the graph then vary as a function of Vds if Cds is shorted? Vds should by definition be 0V.

First, I want to clarify what you're talking about. You referenced the Infineon Power MOSFET App Note in one of the comments, which states: $$\C_{iss} = C_{GS} + C_{GD}, \text{ } C_{DS} \text{ shorted}\$$

You can also find the same condition stated in Vishay/Siliconix datasheets, like in this chart for the SiHF10N40D:

This is quite vague, but the best clarification I found for what they mean by this can be seen in this article under Figure 4 (duplicated below). Typical measurement equipment contains a capacitance ($$\C_{BT3}\$$ in this case) which snuffs out the $$\C_{DS}\$$ of the MOSFET while making the $$\C_{iss}\$$ measurement. Like Brian mentioned, this "AC shorts" the drain and source while the $$\V_{DS}\$$ DC bias can still be swept.

It seems for the graph Vgs is fixed at 0V. How then does the f=1MHz come into play? Which voltage is alternating and with which amplitude?

Sounds like you might be unfamiliar with C-V measurements. A small signal AC voltage (usually in the range 10mV to 100mV) is applied at different DC biases to characterize the non-linear capacitance of various semiconductor devices. A good introduction can be found here, courtesy of Tektronix/Keithley. The important thing to understand is that the AC voltage is small enough to assume linear measurement principles are valid.

Looking at both this app note by Tektronix and this one by Vishay, it appears the typical measurement of $$\C_{iss}\$$ is done by applying the AC voltage at the drain (while sweeping $$\V_{DS}\$$) and reading the AC current at the gate. They both mention a frequency of 1MHz and if you look close enough at the screenshots, the Tektronix one shows an AC test voltage of 30mV.

• Amazon answer! This made things so much clearer to me. Thank you very much for your time and effort!
– ARF
Nov 1, 2020 at 14:44
• @ARF No problem, man! It's a great question, and all these pieces of information are scattered all over the place so it's hard to find a simple answer. It took a while to aggregate it all, but I definitely learned some new things myself in the process. Thanks for the question. Nov 1, 2020 at 17:55

So how can Ciss in the graph then vary as a function of Vds if Cds is shorted? Vds should by definition be 0V.

You are misreading things. Vgs is shorted: -

• Thank you for your answer. My confusion stems in part from page 9 of this Infineon application note which seems to contradict the graph. Are they using different definitions for Ciss, Crss and Coss? Could you also clarify for me how the 1MHz comes into play? Is Vds a sine wave with it's amplitude on the x-axis? For the case of Ciss = 1620pF, is Vds = 15V * sin(2*pift)? Or are they implying an infinitesimally small amplitude for Vds on top of a dc value of 15V?
– ARF
Oct 31, 2020 at 14:23
• @SteKulov you need to do better than that or are you just using a comment below my answer to advertise the fact that you have made an answer i.e. "please also look further than this answer because this answer might be wrong" sort of thing? It is down to the OP to clarify his question. Nov 1, 2020 at 11:03
• I would (if I were you) delete your earlier comment (and this later one) then I'll delete mine. You actually didn't point anything out to me. Nov 1, 2020 at 11:29