You will need to combine three general concepts to obtain what you want in this particular case.
- A power-on reset function: This circuit element senses the power supply voltage, compares it to an internal threshold, and supplies an output (call it PowerOK) that indicates whether the supply has exceeded the threshold. In most cases, PowerOK is a digital signal. As the supply rises from zero, PowerOK remains low until the supply crosses the threshold, then rises to a logic HIGH and tracks the supply as it completes its rising transient. To be useful, the threshold must be hysteretic, lest the output chatter on its way up or down.
- A reset function for the digital state elements: On your 74HC595N, this function is supplied by the MRbar pin. Its internal flops have an asynchronous "resetb", where the flop outputs are always some fixed state (either 0 or 1) whenever "resetb" is LOW, i.e., in the Reset state. Why "resetb", and not "reset"? When the supply comes up, you always want to start your digital state elements in a known state. But if the supply voltage is below the minimum, a valid logic LOW is available (ground) but a valid HIGH may not be.
- Assigning reset values to each element that requires them. Suppose your shift register produces all 0's in the reset state. Suppose further that some elements you're controlling need to 0's, while others need to be 1's. What to do? Generally, the most robust thing to do is to place combinational logic after the state element, and in front of the controlled element.
To glue together these ideas, you'll need to drive your MRbar pin with PowerOK (or possibly, PowerOK AND SomeOtherLogic). Depending on what else in the system uses PowerOK, you may have to generate a locally-delayed copy of it for your shift reg or some other element. Also, depending on the reset value for each element (relay, solenoid, etc.) you may need to add static logic. It may be as simple as an inverter, but you'll need to make sure that the logic function (a) provides the proper reset value when PowerOK rises, and (b) that the logic circuitry can function reliably at your rising PowerOK threshold.