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What is the purpose of the Q1 transistor in this circuit?
I understand that I'm going to have approximately 15V for the Vi positive part, and the Q2 transistor works as a current source.
Also, I know that when the voltage on the capacitor is Vc > Vp the PUT will allow the current go through the 50ohm resistor.
But, how does Q1 affect the charging capacitor?
Q1 simply turns on and discharges C during the negative half cycle, to reset the delay for the next positive half cycle.
Spehro makes a good point; it is not immediately clear if the risetime on C is fast enough to limit the reverse Vbe on Q1 to less than the 5V typically permitted : you might want to check this in simulation, to prevent reverse breakdown of this transistor.
Think about what happens when power is removed from this circuit.
Also, what is the Vbe on Q1 immediately after power is applied (after it's been off for some time). Is anything wrong with that?
