# Questions about cascode current mirror with MOSFETs

I have some queries related to this circuit:

• Is there any way where we can implement it with non-matched MOS transistors?
• If not, how do you calculate the I_output and I_ref relationship?
• I am implementing it but I am not sure how to choose the right values of resistances and source voltages.

This is the circuit:

• Please provide a schematic of the circuit you want to discuss. We can't tell what you mean by I_output or I_ref or the choice of particular components without this. Commented Nov 12, 2020 at 3:57
• I have updated it my question with the circuit! I_ref means I_in Commented Nov 12, 2020 at 4:22

The point of a current mirror is the programming of Iout by the gate voltage from an identical device. If Iin flows through M3 it develops a gate voltage which is in common with the gate voltage on M4. As a result Iout through M4 is the same as Iin through M3.

The second current mirror below M3/M4 formed by M1/M2 follows the same principle.

M3 and M4 should be matched. M2 and M1 should be matched. However not all four (M1, M2, M3, M4) need to be matched.

• Thanks for your response. And if that's the theory, the benefit of using this instead of a mirror mosfet current source is that you will have higher output resistance, right? Commented Nov 12, 2020 at 5:07
• Exactly, the effective output resistance is very much higher than for the simple current mirror. Commented Nov 12, 2020 at 5:13
• Thanks again and two last questions: - What's the expression for the relationship between I_ref and I_out in this case? - Is there any advantage of using MOSFET in this circuit instead of BJT? Commented Nov 12, 2020 at 13:40
• As I mentioned Iin through M3 programs the gate voltage for M4 so ideally I_in and I_out are the same if the devices (M3 and M4) are matched-that's why it's a current mirror. Of course his is not exactly the case as I_in is also supplying a (tiny) gate current to M4 but it's a pretty good approximation. An implementation with BJT would not be quite so good as the base current would load I_in more than the gate current of M4. Commented Nov 12, 2020 at 23:01
• A good way of getting devices with a closer match is with ICs that have multiple MOSFETs. These will be manufactured the same and experience the same environment e.g. temperature considerations as they are on the same die. Look at diodes.com/assets/Datasheets/ds31757.pdf for an example. Commented Nov 12, 2020 at 23:07

You can insert matched resistors in the bottom two FETs, from source to GROUND.

Given the same photolithographic resolution (may) gets used, for both gate dimensions and channel implants and resistor implants, and the same ion_implantation machines are used, you can have very small FETS and very large resistors, to swamp out the FET Vthreshold mismatch.