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I see that the total size of 32Kb = 32 x 1Kb.

The ARM architecture uses 32-bit memory addresses and 32-bit data words.

This means, the ARM memory array depth-width is 2^32 words and 32-bit, which is 32 x 23Kb = 736Kb in total size?

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  • \$\begingroup\$ Didn't understand. What is 23? \$\endgroup\$ – Mitu Raj Nov 12 '20 at 3:59
  • \$\begingroup\$ 2^10 = 1Kb, so 2^11 = 2Kb, 2^12 = 3Kb and so on \$\endgroup\$ – Tan Nguyen Nov 12 '20 at 4:17
  • \$\begingroup\$ The fact, that addres bus is 32bit wide, doesn't mean that memory has depth of 2^32 - it can be smaller \$\endgroup\$ – fifi_22 Nov 12 '20 at 4:17
  • \$\begingroup\$ You sure your math is right? it should go like 1, 2, 4 ..... \$\endgroup\$ – Mitu Raj Nov 12 '20 at 4:18
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    \$\begingroup\$ 2^12 is 4k, not 3k. \$\endgroup\$ – brhans Nov 12 '20 at 4:23
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In ARM architecture, byte-addressing is used. ie., each address location can address a byte.

With 32-bit address bus and byte-addressable scheme, \$2^{32}\$ addressing locations are possible at maximum, and each address location can address a byte.

So the total addressable memory in such a system will be \$2^{32}\$ bytes or 4 GB. This doesn't always mean that you have a big memory array of 4GB in your architecture.

For instance, the 4 GB address space may be shared by different peripherals and their addressing space, and a memory array.

In your example, the memory array in the ARM architecture is [1024-word x 32-bit array]. It has 10-bit address line (which should be derived from 32-bit address bus), and 32-bit data line. It means it can store \$2^{10}=1024\$ words, where each word means 32-bits. So it's correct in your textbook that its a 32 Kb memory array.

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