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AFAIK, JTAG is requires 5 pins (Wikipedia article):

  1. TDI (Test Data In)

  2. TDO (Test Data Out)

  3. TCK (Test Clock)

  4. TMS (Test Mode Select)

  5. TRST (Test Reset) optional.

Let's add two more Power supply Pins (Vcc and GND).

If it is of 7 pins then why most JTAGs connectors come with 10 pin or 14 pin or 20 pin variants.

Most of the pins are either NC or GND. Why so many GND pins are provided? Is there any special reason?

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  • \$\begingroup\$ Remember that you must always use even numbers for cables. Can't have 3 pins on one side, 4 on the other for the sake of simplicity and manufacturing. \$\endgroup\$ – Gustavo Litovsky Jan 8 '13 at 9:09
  • \$\begingroup\$ A "pin" is not the same as a signal. JTAG requires 5 signals (the ones you listed). To implement this electrically you can use 6 pins (5 signal pins and ground). An alternative is SWD which uses two pins. \$\endgroup\$ – Trygve Laugstøl Jan 8 '13 at 13:08
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    \$\begingroup\$ Have a look at the section on JTAG Connectors in the same article. Additional populated pins can carry Resets, GPIO, USB, etc. For the specific question about grounds, Blup1980 has it right. \$\endgroup\$ – embedded.kyle Jan 8 '13 at 13:32
  • \$\begingroup\$ @GustavoLitovsky: Is that why my computer's serial port has 4 pins on one side, 5 pins on the other? \$\endgroup\$ – davidcary Jan 10 '13 at 3:23
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I don't know the exact reasoning for JTAG, but when high speed signals are used and according to the best practices, you should put a GND in between every signal of a flat cable. JTAG can be considered as a High Speed Signal.

Multiple GND wires are used to avoid crosstalk between the signal lines. They avoid capacitive coupling between adjacent lines. And they also provide a separate return path for every signal. Indeed, in high speed signals, the return current "prefers" the path of least impedance. That path is, for high speed signals, the closest GND. Thus the different signals will have different return paths and that avoids crosstalk of the return path.

The final goal is to guarantee good signal integrity, reduced emissions and a better immunity to external disturbances.

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    \$\begingroup\$ Yes indeed. If you look at the common variants for the 14 and 20 pin JTAG connector pinnings you will see that a dual row header is used. All pings along one side are grounded. When the dual row header is mated to a conventional ribbon cable this results in the alternate wires in the cable being GND just like @Blup1980 has indicated. \$\endgroup\$ – Michael Karas Jan 8 '13 at 7:21
  • \$\begingroup\$ If I make a custom JTAG connector of 7pins, it will work but may not guarantee signal integrity, Right? \$\endgroup\$ – Swanand Jan 8 '13 at 7:50
  • \$\begingroup\$ It depends the speed of the signal. If you do so, it could be that you won't be able to reach the maximum speed of the JTAG. But it should work at slow speed without problems. \$\endgroup\$ – Blup1980 Jan 8 '13 at 8:32
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There are no official standards for physical JTAG connectors, existing standard connectors are used instead. One of popular existing options was Everex (10-pin IDC connector, formerly used for connecting DB-9 serial ports to the PC motherboard). 14- and 20-pin IDC connectors are popular options as well, but JTAG isn't limited to these.

One important property of IDC connectors is the strict 1-to-1 pin to wire relationship, so if you need more GND lines, you have to add more pins. You could make a specialized 7-pin connector with several GND wires connected to a single pin and it would work just as well, but such a multipoint connection would mean you cannot simply crimp your connector to a flat cable and be done with it.

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20 year ago during the transition from serial and ISP programmers to JTAGs. The 10 or 20 pin headers supossedly concentrated not just one JTAG bus but as many busses as microprocessors had a unit. not sure if someone could confirm this true?

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    \$\begingroup\$ "not sure if someone could confirm this true", that's your job as an answerer. \$\endgroup\$ – Harry Svensson Jan 10 at 9:32
  • \$\begingroup\$ for 10 pin tagheaders i'm sure i've seen at least 1 having two JTAG busses, but i can't confirm for 20 pin headers. i assume 20 pin headers allow you to interface a JTAG and also access several hardware debug signals, or voltages. btw i was not able to identifly header pinouts at the time, but consistently observed two interfaces in one header. \$\endgroup\$ – sphericsf Jan 10 at 10:32

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