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I'm working with two chips on a board, a dsPIC33F and a PIC24F as well as a serial EEPROM (24FC1025.)

I've seen these little ESD protection devices in 0603 packages:

http://uk.farnell.com/panasonic/ezaeg3a50av/esd-suppressor-0603-15v-0-1pf/dp/1292692RL

For MCUs like I'm using, is this necessary? The boards may be constantly handled and the external interfaces (I2C, UART) may be exposed to ESD.

Would the internal diodes protect the chip anyway and make these pointless?

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You can certainly use such devices. They are usually a poor choice for anything that has lower power usage requirements as they have high leakage current.

You also have to be careful of the clamping voltage, ESD of ~200V can damage a micro-controller, the device you linked is specced at 500V max. Make sure whatever your trying to protect is actually be protected to the extent it needs.

For digital lines also pay attention to the capacitance of these device/package, they can screw up your signal integrity.

What I usually do if the input is likely to get hit with ESD, like an input that is often connected in the field is use a 2 pronged approach.

First Use a ESD device, or diodes closer to the circuit to protect, which type I would use depends on the signal/circuit in question. This is to protect against lower spikes, say 8kV. More and more you see this type of protection inside devices, especially boundary devices like RS232 drives and line drivers.

Second, when you build the PCB use spark gaps, which is really nothing more than putting 2 pads on the surface of the PCB, 1 being the signal, the other being a good ground and spacing them very close to each other, like 6 thou apart. This will protect against higher voltage hits, like 25kV. Pretty simple concept, the high voltage jumps the gap and goes straight to ground. Just be careful how you place these, as close to the connector as possible with the best possible ground connection.

Also pay attention to the manufacturing process your using, you don't want solder to accidental bridge the gap.

Gaps can be tough to do on digital traces and avoid changing the impedance, usually requires tweaking the signal termination after the prototype run.

There is some argument over the proper shape of the pad, some use half moons, some use pointed triangles with the tips near each other and some use square pads. I've always used square pads, the more area that is close to the other pad the more repeated strikes the gap will survive. The trade off is that the square pads will take the most effort to ensure there is no solder bridging. Best answer is to get your CM to not apply solder to these pads at all, but that can require special effort on their part.

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  • \$\begingroup\$ Wow the leakage current is a bit high, but will 2mA generally cause problems? I2C is the only thing I see potentially causing problems as it is open collector. I have 1k resistors, so 1k * 0.002 = 2V drop. Not good. Am I doing this right? \$\endgroup\$ – Thomas O Oct 18 '10 at 20:13
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    \$\begingroup\$ yep, there are devices specifically made for protecting serial data lines, for example: st.com/stonline/products/literature/ds/13569/esdalc6v1-5p6.htm leakage current of 70nA, 12pF capacitance (completely fine for I2C) and clamps at around 14V. In addition an easy way to add extra protection to I2C is to place a series resistor on both the data and clock lines very close to each IC on the bus. Ideally matched to the trace impedance - output impedance of the driver, which is usually like 7-9ohms. So for a 50ohm trace, 41-43 ohms for the resister is good. \$\endgroup\$ – Mark Oct 18 '10 at 20:24
  • \$\begingroup\$ in addition using source termination on I2C is a good idea any time you have lots of devices or the bus will be long (like going through a cable). It will minimize ringing and prevent reflections. You may have to tweak the resistor values in an assembled device as you going trace->connector->cable->connector->trace, which unless you've matched all those impedances there will be some funkiness in the overall path impedance. If the I2C bus is running quite slow compared to the length of the run this may not matter at all. \$\endgroup\$ – Mark Oct 18 '10 at 20:29
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    \$\begingroup\$ If your running any bus at a clock rate where 12pF is overly significant i really hope your paying very, very close attention to signal integrity as your clock rate must be very high. At 10Mhz with 1k pull ups 100pF would be the bus limit without slew rate control, but anything running that fast would either have slew rate control or be differential. I2C at 400khz allows 400pF of bus capacitance without slew rate control, more is possible with proper control. So if your just using 16bit PIC's i highly doubt you have a bus running so fast that 14pF is a big deal. \$\endgroup\$ – Mark Oct 18 '10 at 21:54
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    \$\begingroup\$ On that part, looks fine. Don't know how they measure 0.15pF, i would guess that the package capacitance is somewhere in that neighborhood or higher. In reality when you place these parts on a board there will be some amount of lead inductance as well which works to counteract the capacitance of the part. This is why when working with very small caps, like 10nF, you have to make sure to use the smallest package available to negate as much of the effect of lead inductance as possible. \$\endgroup\$ – Mark Oct 18 '10 at 22:06
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I put similar parts on the signals that leave the board, such as UART, Ethernet, digital I/O. For intra-board signals, don't worry about it.

About the internal diodes: There's a limit of what the diode will take. The internal diodes will be OK with normal handling. The external diodes will protect against larger "shag carpet in the dead of winter" static shocks.

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  • \$\begingroup\$ "Shag carpet in the dead of winter" Love it! \$\endgroup\$ – Thomas O Oct 18 '10 at 17:34

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