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I'm working on building a Class D Amplifier (TPA3122), and from what I understand, you want to connect the grounds of the amplifier using a star connection. On this circuit, I plan on using a DC-DC converter to power some other components (Logic IC's, LED, Isolated Bluetooth Module). So I wanted to still use a ground plane for the converter since I would need it to ensure that there isn't a large amount of inductance in my ground path.

So would it be acceptable to design a Class D amplifier, connecting the amplifier's ground using a star connection, while connecting the DC-DC converter's ground using a ground plane? Side note, I plan on using a DC-DC converter IC (haven't selected a part yet) to regulate an output voltage of 5V, and using another converter to isolate the 5V supply (CRE1S0505S3C) to power the Bluetooth module (generic bluetooth module from Amazon).

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    \$\begingroup\$ Have you read: analog.com/en/analog-dialogue/articles/… It explains why start grounding is a good strategy. It prevents the voltages resulting from large currents through ground connections, to find their way back into the sensitive inputs of your circuit. Think about where large currents flow (amplifier output, DCDC converter) and try to keep the current loops small. If you understand what happens it becomes "obvious" what the strategy should be. \$\endgroup\$
    – Bimpelrekkie
    Dec 1 '20 at 19:58
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    \$\begingroup\$ I would use multiple ground planes (one for DCDC, one for Class D amp., etc) and then star connect those groundplanes. You can use the same layer of course, just separate the individual ground planes with a copper-free area between them. See: electronics.stackexchange.com/questions/399725/… \$\endgroup\$
    – Bimpelrekkie
    Dec 1 '20 at 20:01
  • \$\begingroup\$ Following up on Bippelrekkie comment, I'd use "local battery" bypassing at the Power Switches. This provides the high currents, and the fast_switched currents, as close as possible to the switches. Have a plane under the fast switches, and ground the local_battery capacitors to that plane. \$\endgroup\$
    – analogsystemsrf
    Dec 2 '20 at 4:16
  • \$\begingroup\$ @analogsystemsrf I'm not sure if I completely understand. Do you think that it would be better for me to use a battery? For this project, the amplifier was going to be powered from a USB C wall outlet. \$\endgroup\$
    – Jayvin Street
    Dec 2 '20 at 17:14
  • \$\begingroup\$ Read this: hottconsultants.com/techtips/split-gnd-plane.html. What is your ADC ENOB? \$\endgroup\$
    – user110971
    Dec 2 '20 at 18:40
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So would it be acceptable to design a Class D amplifier, connecting the amplifier's ground using a star connection, while connecting the DC-DC converter's ground using a ground plane?

Ground planes reduce common mode voltages between components by reducing the resistance and inductance of the conductors between components. In the diagram below, the higher \$Z_G\$ is the more voltage the loads \$R_{L1}\$ and \$R_{L2}\$ will see. Now if you suppose that \$R_{L1}\$ or \$R_{L2}\$ are transistors, and \$Z_G\$ is a trace that runs back to the power supply. The first problem is if the current changes through the transistors, it will change the 'ground' voltage for both.

Lets suppose the current is 100mA through a 1" 10mil 0.5oz trace (which will have ~50mΩ of resistance. The voltage (V=IR) generated from the resistance of the trace would be 5mV!

Now lets suppose we use a ground plane instead which would have roughly 0.3mΩ of resistance in one inch, we would only have a 30uV voltage generate from the ground plane resistance with a 100mA current.

It gets more complicated than that with ground planes because the current spreads out in two dimensions (and currents should be controlled in two dimensions for very low level designs), but the advantage of a ground plane having less resistance can be seen. In almost all designs using a ground plane is better than running traces.

If I were designing a two plane design and I couldn't have a ground plane and only run traces, I would calculate the trace resistance and simulate the design with the 'parasitic' resistance of the traces to see how it behaved.

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Source: (pg 129) Electromagnetic Compatibility Engineering. Author(s):. Henry W. Ott.

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