The CAN Standard states a max. common mode voltage of -2 V to +7 V. There are transceivers however, that allow for e.g. +-25 V common mode voltage range. How is that achieved? I imagine (I do not really know and that is why I am asking), internally such a transceiver will have some transistors, at the input as well as output, which need to be biased in order to switch on and off. At the input there may be a sort of comparator to sense the differential voltage. My question is how a higher common mode voltage rating is achieved at all (by which means)? Is there an example schematic of a CAN-transceiver's internals which would help me understand?

edit: I thought about little more and came to the conclusion that maybe a differential input would be appropriate to sense a differential signal. So with this in mind I came up with the following possible (?) input structure (please see the screenshot from LTspice below). Next step would be to think about where common mode limits may arise. I have no idea yet. Who does?

  1. What techniques exist to increase the common mode voltage range CAN-transceivers?

  2. What about differential input structure (see below)?

  3. Where does the common mode range restriction arise for such a structure?

Possible input structure

  • \$\begingroup\$ Typically there would be isolation between the difference amp (which is likely configured as a comparator with digital output, this assumption simplifies crossing an isolation barrier) and the processor interface. This isolation could be built into a transceiver IC, then the transceiver IC specs would allow large common-mode. \$\endgroup\$
    – Ben Voigt
    Dec 2, 2020 at 20:33
  • \$\begingroup\$ You mean like opto-isolation? Wow, that complicated? \$\endgroup\$
    – stowoda
    Dec 2, 2020 at 20:44
  • \$\begingroup\$ Regarding the example, just check a datasheet? MCP2562FD. Example on page 2, looks somewhat similar to your schematic though with MOSFET, p and n channel on CANH and CANL respectively. \$\endgroup\$
    – Lundin
    Dec 3, 2020 at 9:53
  • \$\begingroup\$ @Lundin Thanks, but that datasheet does not help in understanding the particular common mode range. It would be interesting to see what is inside that black box called "Driver and Slope Control". At least a representation of what is inside. \$\endgroup\$
    – stowoda
    Dec 3, 2020 at 10:04
  • \$\begingroup\$ I wonder if this topic is to complicated or no one has an idea how to answer? Or if there is just no awareness? \$\endgroup\$
    – stowoda
    Dec 8, 2020 at 7:16

2 Answers 2


There are transceivers however, that allow for e.g. +-25 V common mode voltage range. How is that acheived?

The input circuit limits the current, clamps the input to within some margin outside of the rails, and never deals directly with common modes outside of the voltage rails. Each input is divided down via a resistive divider before it goes into the input stage. The input stage "sees" voltages within CM limits, with differential mode signals attenuated. This is no problem - the subsequent stages use gain to recover this.

The output circuit does not deal with these offset common modes at all. In the recessive state, the output is open. In the dominant state, both outputs are driven to one rail each. The drivers are protected, so if an external source attempts to overdrive either line outside of the GND/VCC rails, the driver devices (mosfets or transistors) effectively open or are current- and dissipation-limited.

what techniques exist to increase the common mode voltage range CAN-Transceivers

Many. Some possibilites:

  • Replace the CAN receiver with a high-voltage instrumentation amplifier configured for gain 1, with output relative to VCC/2. Invert that signal relative to VCC/2, and feed both to a CAN receiver. The common mode range is then whatever common mode range the in-amp is.

  • Float the CAN receiver using an isolated supply.

There is no need for increasing the active common mode voltage on the transmitter: the transmitter drives "hard" to rails, and the receivers are supposed to deal with any common mode. The transmitter should still survive common mode excursions without damage in the dominant mode of course.

What about differential input structure (see below)?

What about it, other than it won't do the job?

Where does the common mode range restriction arise for such a structure ?

First of all, the structure is insufficient to implement a compliant receiver. It has poorly controlled differential gain, and CAN has specified thresholds. It doesn't implement them. Furthermore, common mode excursions will destroy it - that's assuming that the circuit is implemented using a fully dielectrically isolated process where individual devices don't have parasitic diodes nor transistors to substrate. Otherwise, common modes outside of about +/-1V of the rails will bias parasitic components into usually hard conduction. Depending somewhat on the size of the chip and the substrate conductivity, this is destructive unless otherwise mitigated.

The CM voltages are given relative to LocalGND.

  • When the common mode dips below about 1V, I1 runs out of headroom and the input differential pair shuts down. Once the common mode is below about -6V, Q1 and Q2 B-E junctions break down. At about -12V, I1's B-E junctions break down, and the input is shorted to LocalGND via what amounts to a 12V Zener diode. Eventually, Q1 and Q2's B-C junctions will break down, and R3 evaporates.

  • When the common mode goes above LocalVCC, Q1 and Q2 start conducting in reverse - from base to collector. Q5 and Q4 shut down. As the inputs reach about LocalVCC+7V, Q5 and Q4's B-E junctions break down in reverse, and unlimited destructive current flows from inputs to LocalVCC.

My question is how a higher common mode voltage rating is achieved at all (by which means)?

At the most basic: with a bunch of resistors - same way high-voltage instrumentation amplifier front-ends do it.


simulate this circuit – Schematic created using CircuitLab


simulate this circuit


simulate this circuit

In practice, the large current flowing through R3-R4 and R5-R6 is undesirable, and a local common-mode buffer may be used instead:


simulate this circuit


A voltage divider is used.

I don't know of any CANbus internal schematics offhand, but the standard is based upon RS-485, for which some schematics are available. Consider the ancient SN75176A, Fig. 8-1 middle:

Typical A and B I/O port structure

The two right-hand transistors and diodes constitute a bias network, probably a complementary emitter follower from an internal threshold (may be referenced to the opposite line; further internal structure is not shown of course). Notice the 16.8k into 480Ω (parallel Thevenin equivalent) resistor divider: this reduces the signal level from -7 to 12V (maximum common mode input range), to -194 to 333mV (change relative to the mean, the bias level).

Notice this puts significant pressure on the receiver stage (comparator) to read the level correctly; if its own error is typically 2-5mV (compare with contemporary untrimmed bipolar types like LM393), that error is multiplied by the inverse divider ratio to say 72-180mV at the terminals. Indeed, the receiver is only guaranteed to read correctly outside the -200 to 200mV range, so it seems likely this is such an example, an untrimmed bipolar comparator circuit with matched resistor dividers (the resistors might be laser-trimmed however, to ensure CMRR and matched gain; they might also be monolithic fabbed where the absolute value is crudely controlled (hence the "NOM"inal specifier) but the ratios are well matched).

For another example, older but more complete, consider DS75115N:

DS75115N internal schematic

This (somewhat obscure?) receiver relates to different standards (possibly MIL-STD-188-114A, I'm not sure?), and uses a different input bias network, but you can still see a similar scheme in use: inputs wired through resistor dividers. (I'm not sure offhand the exact function of the input current mirror (the three common-base transistors, with the 130Ω emitter and shared 150Ω emitter resistors), but it seems likely it extends the positive input CM range by actively pulling down on the diff pair bases (pulled up via 1.64k resistors). This comes somewhat at the expense of higher input bias current (the "unit load" here is approximately the 7k and 8k in parallel), whereas modern RS422/485/CAN/etc. receivers have much higher input resistances (fractional "unit load" inputs).

I'm sure I've seen a schematic of SN75176 and friends before, but I can't seem to find one online right now. So, consider this diagram as a representative alternative, but not a direct substitute.

Anyway, keep in mind, these are archaic bipolar solutions to the same problem -- modern CMOS devices may choose to employ similar methods (matched pair resistor dividers into CMOS comparator), or may have more bespoke methods.

...Aha, SN65HVD23x give a little bit more detail, and without making reference to older standards; these are native CAN interfaces.

SN65HVD23x equivalent pin diagrams

Curiously, they show the ESD diodes twice (the 16 and 20V double-zeners to CANH/L). Important here is the input resistor divider (shown this time as 110k up, 45k series, and 4.5k at Vcc/2 Thevenin equivalent), and they actually happen to show an NPN BJT with current source in the emitter circuit -- they don't show further connections but this will certainly be the differential pair of the comparator section, with common emitter CCS.

Also curiously, they show different MOS symbols (the BJT-like IC shorthand symbols*, bottom-left; MOSFETs proper everywhere else). Well, TI isn't exactly renowned for their quality diagrams these days (or even two decades ago when this datasheet was first written, honestly).

*Which, as I love to rant about... are strictly wrong: the arrow indicates conventional current flow, so, apparently the built-in diode would be downward on both, shorting out the supply? Well, anyway...

As design solutions go, it's... well it is and it isn't an interesting question: given that most ICs clamp inputs either to supply rails or zener diodes (or other ESD structures), it may seem odd to have inputs with wider operating ranges; but, well, a resistor divider does well enough, as long as your bandwidth and noise margins are designed appropriately (which, as we've seen, this might drive the 200mV minimum input signal level, for example). It's a dumb, brute-force solution, but when a brute-force solution is adequate... so what? :)

In any case -- apologies for the piecemeal exploration of multiple not-necessarily-relevant-or-related product families; these things aren't exactly widely available, and you only really know by decapping and tracing the circuit.

Which, decapping is more and more accessible these days -- particularly for older chips where a visible microscope suffices to resolve the structures. I don't see a CAN interface decap offhand, but, Google is terrible at searching these things. You might want to peruse https://siliconpr0n.org/ or https://zeptobars.com/ and see if they have anything, and, I think there are a few other related sites out there too; search around.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.