I am just getting stuck as to what's happening.
Below explains the functionality of each of the hardware and how they interact with each other to give you a better idea of the situation.
HARDWARE USED:
NOTES:
ESP32 (Master)
- Uses I2S to send stereo audio samples to the STM32 (slave)
- It samples stereo audio at 48kHz
STM32 (Slave)
- Receives and sends stereo audio samples from the ESP32 (Master) and to the DAC (Slave)
- It doe DSP on the stereo audio samples
PMODI2S2: DAC (Slave)
Receives and sends stereo audio samples from the STM32 (Slave) and to speakers
This is using no DSP (Unity IIR Filter)
DIAGRAM:
THE PROBLEM:
In the code of the ESP32 the I2S timing are as follow
i2s_config_t i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
.sample_rate = 48000,
.bits_per_sample = 24,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6,
.dma_buf_len = 60,
.intr_alloc_flags = 0,
.use_apll = true, //Default interrupt priority
.tx_desc_auto_clear = true //Auto clear tx descriptor on underflow
};
So this essentially tells me the ESP32 is going to create a:
$$ SCLK = 2channel * 32bit * 48kHz = 3MHz$$
$$ MCLK = 256 * 48kHz = 12.28MHz$$
or
$$ MCLK = 384 * 48kHz = 18.4MHz$$
$$ LRCLK = 48kHz$$
that's fine, understood I2S standard, now in my STM32 code ill setup the I2S to match the timings of the ESP32 as such:
SPI3 -> I2SCFGR |= SPI_I2SCFGR_WSINV_I2S;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_DATALEN_24BIT;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_FIXCH;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_CKPOL_FALL_RISE;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_I2SSTD_I2STAND;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_CHNEL_32BIT_WIDE;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_I2SCFG_SLAVE_FULLDUPLEX;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_I2SMOD_I2S_PCM_MODE;
SPI3 -> I2SCFGR |= SPI_I2SCFGR_DATFMT_LAlign;
This matches up with the ESP32 timings, so everything should work. as Datalength = 24bit channel length = 32bit and the rest of the I2S standard, MSB first, left align, etc
The DAC says in the datasheet it can autodetect timings listed here.
Perfect, the DAC can support 256x and 384x ratios at 48kHz and a bit timing up to 24 bit on the SCLK.
HOWEVER, when I run the code and test, the audio sounds its skipping and audio sounds faster (Its high pitched and sounds fast forwarded like mickie mouse haha).
WHAT I FOUND OUT:
If I change the bits in the ESP32 to 16 bits, it works no problem, sounds good. I further tinkered with it and found out it doesn't matter what data length nor channel you have it at on the STM32 if the ESP32 bit is set at 16, it sounds normal with data length of 16/24/32 and a channel length = 16/32
Why's that? This is ruining my understanding, I thought the bits determine the SCLK frequency, so how does it make sense if I change my ESP32 bit to 16 to get a SCLK = 1.5MHz and in the STM32 I can have a SCLK of = 3MHz and still works?
I know the STM32 is a slave which is kinda confusing and doesnt generate these signals then whats the point of configuration the data length and channel length at all then?
UPDATE 1:
When putting back my DSP filters I noticed that changing it to 16/24 data length now causes massive static like sound, and the only thing that fixed it was putting it to 32 data length
