While being introduced to carry save addition technique, I was told that the time taken for adding 3 n-bit binary numbers using ripple carry adders will be (2n+1)t_FA (Assuming we neglect the minor time difference between a full adder and a half adder), where t_FA is the delay for a full adder.
Excerpt from wikipedia:https://en.wikipedia.org/wiki/Carry-save_adder "If you were to add these 3 numbers using conventional methods, it would take you 2 carry-propagate adder delays to get to the answer. If you use the carry-save technique, you require one only 1 carry-propagate adder delay and 1 full-adder delay (which is much lower than a carry-propagate delay) and. Thus, CSA adders are typically very fast."
The reasoning was that it takes n(t_FA) time for adding 2 n-bit numbers using an n bit ripple carry adder and since the output can have at most n+1 bits, to add the 3rd number and the intermediate result requires (n+1) FAs and hence (n+1)t_FA and therefore total time of (2n+1)t_FA
Can someone show this through a circuit diagram?