I am experimenting with the HDMI port of an ULX3S FPGA board. I have been able to properly generate DVI signals with a resolution of 800x600 and framerate of 60 Hz. I am now trying generate actual HDMI signals (instead of DVI). I order to do so, I have modified the design to include the extra signalization required by HDMI. Before each row of pixel data, I am including the 8-pixel video preamble (as described in the HDMI 1.4b standard, section 22.214.171.124) and the 2-pixel video guard (as described in section 5.2.2).
The screen, instead of identifying the signal as HDMI, it still identifies it as DVI, with a resolution of 802x600, and shows a 2-pixel magenta column at the left of the image, so it seems that it is treating the 2-pixel guard as pixel data.
According to annex C.3,
An HDMI Sink, upon power-up, reset or detection of a new source device, shall assume that the source device is limited to the above behavior. Upon the detection of an indication that the source is HDMI-capable, the HDMI Sink shall follow all of the HDMI Sink-related requirements specified in this document.
I am not sure what a "an indication that the source is HDMI-capable" is. Is the inclusion of the video preamble and guards enough or is there anything else needed to have the sink identify the signal as HDMI instead of DVI?