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I already spend a plenty of time for understanding the design which I got from TI WEBBENCH, and gets clear bit understanding of it,but still I have some doubts, of those I want explanation.

Design is : enter image description here

  1. Why in all the designs which I see the VCC pin of the PWM controller(here in this design is UC1845AJG) is connected to aux winding of transformer as well as with the bridge rectifier output i.e. main line ? The following explanation for vcc pin I got in datasheet but I am confused with it.

enter image description here

  1. What is the use of Qsc near the Vref pin ?

  2. Provides MOSFET rating in design is vds=800v, I want to understand how it is decided ?

  3. Why two schottky diode are used in parellel on output side?

Please point me out to the related article if these question are tool silly too answer.I am ready for more digging.

I will be very thankful to you.

EDIT1: IC i am using is UC1845AJG

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  • \$\begingroup\$ What data sheet? Where's the link? The part number and your circuit values are not easy to read even when magnified. \$\endgroup\$
    – Andy aka
    Dec 13 '20 at 14:05
  • \$\begingroup\$ Edited the question with IC number and datasheet link,please suggest me what I can do for circuit,may be values are not much matter for my problem. \$\endgroup\$ Dec 13 '20 at 14:16
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  1. When powering up the circuit, all you'll have is the main bus voltage, and no oscillations. The resistors connected directly to the bus allow for a startup voltage, to initialize the IC and command the MOSFET with pulses. After that hapens, the switchings will cause the auxiliary winding to provide a voltage, which will take over; that will make the circuit self-sustained. If you look closely, the two resistors are even named Rstartup, and they're two to provide better power handling.
  2. It provides slope compensation. In short, there can be subharmonics when the duty cycle is around or greater than 0.5, and adding a reversed slope than that of the current can cure it. Since the current is trapezoidal or triangular, the ramp oscillator provides a readily available resource (the base of Q1 is at the RT/CT pin). The naming of the transistor and the resistor have sc in it, which probably comes from "slope compensation". There are plenty of links if you search the web, or see this answer, for example.
  3. The bus voltage, for a 230 Vrms from the mains, will be 325 Vdc. The inductive switching regime of the circuit will cause the emf to reach twice that voltage. If you account for a maximum RMS input of (a fairly common) 265 Vrms, the peak would be 375 Vdc, times 2 that's 750 Vdc, add some clearance (maximum datasheet value, spikes, variations, etc), and you get 800 Vdc.
  4. The output is either high current, or it uses a two diode package (looks like a transistor). If it's the first, it halves the dissipated power on each diode, if the latter, you can't really cut in two the package (and expect it to work), and it wouldn't make to much sense to use only one half (why did you bother to buy it in the first place).
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    \$\begingroup\$ Good answer Monsieur Concerned Citizen. Just a quick comment: the maximum \$BV_{DSS}\$ of the MOSFET needs to account for the maximum rectified voltage + the reflected voltage during \$t_{off}\$ + the selected clamp voltage (usually 1.3-1.5 times the reflected voltage) and + the clamp diode overshoot, at least 20 V. So the starting point is really the \$BV_{DSS}\$ to which a derating factor \$k_d\$ is applied. If a 15% margin is adopted, then you make sure the maximum voltage in worse case never exceeds 680 V if we talk about a 800-V MOSFET. Industrial designs usually adopt a 600-650-V type. \$\endgroup\$ Dec 13 '20 at 18:44
  • \$\begingroup\$ @VerbalKint Merci beaucoup, though I don't deserve it. I just assumed a 50% duty cycle and I completely missed the RCD snubber (and a universal AC input). \$\endgroup\$ Dec 13 '20 at 20:29

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