(note: this post has been updated as suggested by members)
The schematic below shows a single coil to be pulsed by n & p FETs. Each FET has 100V ds breakdown and < 10 mOhm Rds. Vgs threshold is +/- 2V for each. Vgs max = +/- 20V. There is no possibility for both FETs to have low Rds at the same time.
The objective of the circuit is to pulse a single coil in either direction. Each pulse should be considered independent of those prior - there is no timing relationship between pulses other than a minimum time interval between them. This is not a motor driver. Pulses aren't alternating. The coil is being used to repel a magnet. There will be significant concerns due to the magnet - I have a good understanding of those concerns and am only interested in the circuit provided (i.e. without magnet).
Once I know how to protect the FETs I will push the circuit right to the point where Vds is almost exceeded. I could get FETs of Vds max = 120V but question would be the same with rails at +/- 60V instead of 50V. I could keep going until Rds is too large or FETs get too expensive, so these specific values aren't the point of my post. The idea is to push the limits while protecting the FETs.
The coil shown is ~ 40mH with internal resistance 140 ohms, but I am interested in general principles that work for variable coil parameters. Assume between 5mH and 100mH. Vdd may be as low as 12V and as high as 50V as I experiment with pulse widths, duty cycles and field strengths. I realize back EMF may be significant, and I'm not sure how to protect the FETs other than to just lower Vdd. Current demand per pulse will be way below FET capability.
Consider gate signals to be wired correctly. Assume the circuit is perfect on that side of the schematic - it will not be a challenge. (unfortunately I didn't state this well upon first posting and there was a lot of confusion on that point. many apologies to those that wasted time because of it).
Last point which I'm sure some will ask me regards pulse widths and duty cycle. The hope is to create pulses at widths between 0.1ms and 2ms. Duty cycle flexible depending on noise, heat, ringing and of effects from back EMF. The ideal case which I don't expect to achieve: 0.5ms pulses that aren't a terrible mess (some ringing/noise will be acceptable). Current between 0.15A and 0.5A. Duty cycle 0.3 max. The final result can be a bit off from this and I'll be happy.
Many thanks for everyone's help already, specifically DKNguyen and Bruce Abbott!