Can we declare Schmitt triggers to have memory? Can we call their output levels states? [closed]

Question

Are Schmitt triggers able to be declared as having memory? Can we call their output levels states?

Answer 1

Yes, "memory" in the sense of "this system is not memoryless" is any difference in behaviour that depends on previous internal or external state.

Since the exact idea of a Schmitt trigger is that the switching threshold depends on the state, yeah, that's a system with memory.

Answer 2

A latch is like the simplest form of memory. If you configure a Schmitt trigger as a latch, it is not a stretch to call it one bit of memory. But any buffer can be set up as a latch.

I guess I am interpreting this as kind of a digital question. But the other answers which are coming from a slightly different angle are also very thoughtful.

Answer 3

If the input voltage is in the range between threshold voltages then the ST has memory.

The output state depends on the history of inputs.

Otherwise the output is predictable from the input voltage, and has no dependency on history.

For example, a ST could be made like this:

^{simulate this circuit – Schematic created using CircuitLab}

The DC input is 0V (at the left sides of R4/R2), which is in between the two thresholds of about +/-800mV).

The output is set and reset by the edges of V3 (ignore the 0V at the beginning, that's a kind of simulator artifact- the ST is balanced on knife-edge- a metastable condition).

Answer 4

A Schmitt trigger is only a memory if you assume that you have a ternary logic system, where the three possible input conditions are valid 0, valid 1, and something in between.

If you are talking about a strict binary logic system, where all signals are either at a logic 0 or a logic 1, then a Schmitt trigger does not have memory.

Answer 5

The hysteresis phenomenon caught my attention in the early 80's when I invented a magnetically controlled electric switch and later applied it as an ARM/DISARM device in alarm systems. I have been thinking for a long time about the philosophy behind the legendary circuits of Schmitt trigger, RS latch and SRAM memory cell... and what they have in common. Ten years ago, I revealed the fundamental idea of making a hysteresis on the Wikipedia page about the Schmitt trigger. This question, the comments and answers below it, made me think deeply about all this again... and today the picture became clearer. This made me feel as excited as any other time when I realize a great circuit idea... and I am in a hurry to share it with you...

A) All these building blocks are the same circuits with reinforcing positive feedback that forces them to stand alone in one of their two extreme states; so all they possess memory. The difference between them is only in the way we force (toggle) them to change their current state with the opposite:

1. In a Schmitt trigger, we do it in an arithmetic way by summing the input voltage with the feedback voltage.
2. In an RS latch, we do it in a logical way by forcing the output of the logic gate to be in a certain state. We do this "politely" by means of a second input of the logic element (during this time the first input is "disconnected" from the output).
3. In an SRAM memory cell, we do it "brutally" by applying the input voltage directly to the output of the logic gate (connecting the memory cell outputs to the data lines by turning on the pass transistors).

B) To see the memory property, in all these cases, we have to return the input signal to its inactive (neutral) state:

1. In a Schmitt trigger, we have to set the input voltage inside the hysteresis loop (usually, in the middle between the high and low voltage threshold).
2. In an RS latch, we have to set the input voltage high (NAND gates) or low (NOR gates).
3. In an SRAM memory cell, we have to disconnect the memory cell outputs from the data lines by turning off the pass transistors.

If we do not return the input signal to its inactive (neutral) state, all these circuits will be forced to remain in the last state. This only makes sense for the Schmitt trigger.

C) Here the question arises, “Why are there different ways to manage the same devices?"

1. The Schmitt trigger is implemented by a single device (non-inverting amplifier). Therefore, we can change its state by affecting one place (feedback) in two different ways (above the upper threshold and below the lower threshold). We do this with the help of a summing device (usually, two resistors).
2. The RS latch and SRAM memory cell are implemented by two cascaded devices (a non-inverting amplifier consisting of two cascaded inverting amplifiers). To change their state, we have to affect alternately two places in the same way. Once affected one place (S), it no longer works ... we have to affect another (R).

D) Interesting questions would be, "Can we make an RS latch by a Schmitt trigger?" and "Can we make a Schmitt trigger by an RS latch?" Why not? I think we can...